From 77d3b655ed5aa0bff07cc82fe5f7abc00dacf41b Mon Sep 17 00:00:00 2001
From: Elyes HAOUAS <ehaouas@noos.fr>
Date: Sun, 31 Jan 2021 08:28:45 +0100
Subject: nb/intel/ironlake/bootblock.c: include <arch/pci_io_cfg.h>

Change-Id: Ide960d7957e8a95961ec3722ad7478926a84c544
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49538
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
---
 src/northbridge/intel/ironlake/bootblock.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

(limited to 'src/northbridge')

diff --git a/src/northbridge/intel/ironlake/bootblock.c b/src/northbridge/intel/ironlake/bootblock.c
index 4b174cb0f6..02b63a64b3 100644
--- a/src/northbridge/intel/ironlake/bootblock.c
+++ b/src/northbridge/intel/ironlake/bootblock.c
@@ -1,9 +1,10 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
 #include <arch/bootblock.h>
+#include <arch/pci_io_cfg.h>
 #include <assert.h>
-#include <device/pci_ops.h>
 #include <types.h>
+
 #include "ironlake.h"
 
 static uint32_t encode_pciexbar_length(void)
-- 
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