From 67d59d1756423a96aca5249b59c4e3759b2f3721 Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Sat, 16 Nov 2019 20:06:20 +0100 Subject: nb/intel/sandybridge: Configure DCACHE_BSP_STACK_SIZE The romstage default is to set stack guards at 0x2000 below end of stack. The code is now overwrites some of the stack guards so increase the stack size to a comfortable 0x2800. Change-Id: I91f559383a987241b343e743d11291f2c100f7f5 Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/c/coreboot/+/36884 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber --- src/northbridge/intel/sandybridge/Kconfig | 3 +++ 1 file changed, 3 insertions(+) (limited to 'src/northbridge') diff --git a/src/northbridge/intel/sandybridge/Kconfig b/src/northbridge/intel/sandybridge/Kconfig index 64ce4d82d9..288dd093bf 100644 --- a/src/northbridge/intel/sandybridge/Kconfig +++ b/src/northbridge/intel/sandybridge/Kconfig @@ -76,6 +76,9 @@ config DCACHE_RAM_BASE hex default 0xfefe0000 +config DCACHE_BSP_STACK_SIZE + hex + default 0x2800 if USE_NATIVE_RAMINIT -- cgit v1.2.3