From 67c73110e96ec6f1ec90c12f1ed6aac95107e896 Mon Sep 17 00:00:00 2001
From: Keith Hui <buurin@gmail.com>
Date: Thu, 16 Apr 2020 20:45:30 -0400
Subject: nb/intel/i440bx: Resolve a SMP-raminit TODO

Change-Id: I0087294bccee079368c93ba8986873a5e65593b0
Signed-off-by: Keith Hui <buurin@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40957
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
---
 src/northbridge/intel/i440bx/raminit.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

(limited to 'src/northbridge')

diff --git a/src/northbridge/intel/i440bx/raminit.c b/src/northbridge/intel/i440bx/raminit.c
index dddcc217f4..ee1e75902e 100644
--- a/src/northbridge/intel/i440bx/raminit.c
+++ b/src/northbridge/intel/i440bx/raminit.c
@@ -123,8 +123,11 @@ static const u8 register_values[] = {
 	 * [01:00] Reserved
 	 */
 	NBXCFG + 0, 0x0c,
-	// TODO: Bit 15 should be 0 for multiprocessor boards
+#if CONFIG(SMP)
+	NBXCFG + 1, 0x00,
+#else
 	NBXCFG + 1, 0x80,
+#endif
 	NBXCFG + 2, 0x00,
 	NBXCFG + 3, 0xff,
 
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