From 59e3e0299112070e51c4dabc8f616344e291956f Mon Sep 17 00:00:00 2001 From: Sebastian Andrzej Siewior Date: Fri, 26 Oct 2012 19:01:45 +0200 Subject: northbridge/sch: read the size of main memory from the proper register I don't know if the size main memory supposed to be in PCI(0,0) reg 0x9c but it is not written there. The size of memory is written in src/northbridge/intel/sch/raminit.c to SCH port(2, 8, 4) (look for "Setting up TOM"). Change-Id: Iea04a5185bda56f61d1c382533d5a0dac429ebbd Signed-off-by: Sebastian Andrzej Siewior Reviewed-on: http://review.coreboot.org/1629 Reviewed-by: Patrick Georgi Reviewed-by: Stefan Reinauer Tested-by: build bot (Jenkins) --- src/northbridge/intel/sch/northbridge.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'src/northbridge') diff --git a/src/northbridge/intel/sch/northbridge.c b/src/northbridge/intel/sch/northbridge.c index 4ca1248a0b..4c41d68fbd 100644 --- a/src/northbridge/intel/sch/northbridge.c +++ b/src/northbridge/intel/sch/northbridge.c @@ -111,10 +111,10 @@ static void pci_domain_set_resources(device_t dev) printk(BIOS_SPEW, "Base of stolen memory: 0x%08x\n", pci_read_config32(dev_find_slot(0, PCI_DEVFN(2, 0)), 0x5c)); - tolud = pci_read_config8(dev_find_slot(0, PCI_DEVFN(0, 0)), 0x9c); - printk(BIOS_SPEW, "Top of Low Used DRAM: 0x%08llx\n", tolud << 24); + tolud = sch_port_access_read(2, 8, 4); + printk(BIOS_SPEW, "Top of Low Used DRAM: 0x%08llx\n", tolud); - tomk = tolud << 14; + tomk = tolud / 1024; tomk_stolen = tomk; /* Note: subtract IGD device and TSEG. */ -- cgit v1.2.3