From 580e7223bb617cfa14bf24e48bb39bac47c4e8e0 Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Thu, 19 Mar 2015 21:04:23 +0200 Subject: devicetree: Change scan_bus() prototype in device ops MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The input/output value max is no longer used for tracking the bus enumeration sequence, everything is handled in the context of devicetree bus objects. Change-Id: I545088bd8eaf205b1436d8c52d3bc7faf4cfb0f9 Signed-off-by: Kyösti Mälkki Reviewed-on: http://review.coreboot.org/8541 Tested-by: build bot (Jenkins) Tested-by: Raptor Engineering Automated Test Stand Reviewed-by: Timothy Pearson Reviewed-by: Patrick Georgi --- src/northbridge/amd/agesa/family10/northbridge.c | 10 +++------- src/northbridge/amd/agesa/family14/northbridge.c | 3 +-- src/northbridge/amd/agesa/family15/northbridge.c | 10 +++------- src/northbridge/amd/agesa/family15rl/northbridge.c | 3 +-- src/northbridge/amd/agesa/family15tn/northbridge.c | 3 +-- src/northbridge/amd/agesa/family16kb/northbridge.c | 3 +-- src/northbridge/amd/amdfam10/northbridge.c | 10 +++------- src/northbridge/amd/amdk8/northbridge.c | 10 +++------- src/northbridge/amd/pi/00630F01/northbridge.c | 3 +-- src/northbridge/amd/pi/00730F01/northbridge.c | 3 +-- src/northbridge/intel/i3100/pciexp_porta.c | 5 +++-- src/northbridge/intel/i3100/pciexp_porta_ep80579.c | 5 +++-- 12 files changed, 24 insertions(+), 44 deletions(-) (limited to 'src/northbridge') diff --git a/src/northbridge/amd/agesa/family10/northbridge.c b/src/northbridge/amd/agesa/family10/northbridge.c index 6ba6770e11..0fe1910577 100644 --- a/src/northbridge/amd/agesa/family10/northbridge.c +++ b/src/northbridge/amd/agesa/family10/northbridge.c @@ -554,7 +554,7 @@ static void mcf0_control_init(struct device *dev) { } -static unsigned amdfam10_scan_chains(device_t dev, unsigned unused) +static void amdfam10_scan_chains(device_t dev) { unsigned nodeid; struct bus *link; @@ -580,8 +580,6 @@ static unsigned amdfam10_scan_chains(device_t dev, unsigned unused) } dev->bus->subordinate = max; - - return unused; } static struct device_operations northbridge_operations = { @@ -907,7 +905,7 @@ static void amdfam10_domain_set_resources(device_t dev) } } -static u32 amdfam10_domain_scan_bus(device_t dev, u32 unused) +static void amdfam10_domain_scan_bus(device_t dev) { u32 reg; int i; @@ -944,7 +942,6 @@ static u32 amdfam10_domain_scan_bus(device_t dev, u32 unused) pci_write_config32(f0_dev, HT_TRANSACTION_CONTROL, httc); } } - return unused; } @@ -1012,7 +1009,7 @@ static void add_more_links(device_t dev, unsigned total_links) last->next = NULL; } -static u32 cpu_bus_scan(device_t dev, u32 passthru) +static void cpu_bus_scan(device_t dev) { struct bus *cpu_bus; device_t dev_mc; @@ -1188,7 +1185,6 @@ static u32 cpu_bus_scan(device_t dev, u32 passthru) amd_cpu_topology(cpu, i, j); } //j } - return passthru; } static void cpu_bus_init(device_t dev) diff --git a/src/northbridge/amd/agesa/family14/northbridge.c b/src/northbridge/amd/agesa/family14/northbridge.c index 426ec74c1f..32b74f6ee7 100644 --- a/src/northbridge/amd/agesa/family14/northbridge.c +++ b/src/northbridge/amd/agesa/family14/northbridge.c @@ -765,7 +765,7 @@ static void domain_enable_resources(device_t dev) /* Bus related code */ -static u32 cpu_bus_scan(struct device *dev, u32 passthru) +static void cpu_bus_scan(struct device *dev) { struct bus *cpu_bus = dev->link_list; device_t cpu; @@ -784,7 +784,6 @@ static u32 cpu_bus_scan(struct device *dev, u32 passthru) if (cpu) amd_cpu_topology(cpu, 0, apic_id); } - return passthru; } static void cpu_bus_init(device_t dev) diff --git a/src/northbridge/amd/agesa/family15/northbridge.c b/src/northbridge/amd/agesa/family15/northbridge.c index e480ebaff7..94e16acea6 100644 --- a/src/northbridge/amd/agesa/family15/northbridge.c +++ b/src/northbridge/amd/agesa/family15/northbridge.c @@ -459,7 +459,7 @@ static void nb_set_resources(device_t dev) } } -static unsigned scan_chains(device_t dev, unsigned unused) +static void scan_chains(device_t dev) { unsigned nodeid; struct bus *link; @@ -485,8 +485,6 @@ static unsigned scan_chains(device_t dev, unsigned unused) } dev->bus->subordinate = max; - - return unused; } @@ -953,11 +951,10 @@ static void domain_set_resources(device_t dev) } /* all family15's pci devices are under 0x18.0, so we search from dev 0x18 fun 0 */ -static unsigned int f15_pci_domain_scan_bus(device_t dev, unsigned int unused) +static void f15_pci_domain_scan_bus(device_t dev) { struct bus *link = dev->link_list; pci_scan_bus(link, PCI_DEVFN(0x18, 0), 0xff); - return unused; } static struct device_operations pci_domain_ops = { @@ -1011,7 +1008,7 @@ static void add_more_links(device_t dev, unsigned total_links) last->next = NULL; } -static u32 cpu_bus_scan(device_t dev, u32 passthru) +static void cpu_bus_scan(device_t dev) { struct bus *cpu_bus; device_t dev_mc; @@ -1187,7 +1184,6 @@ static u32 cpu_bus_scan(device_t dev, u32 passthru) amd_cpu_topology(cpu, i, j); } //j } - return passthru; } static void cpu_bus_init(device_t dev) diff --git a/src/northbridge/amd/agesa/family15rl/northbridge.c b/src/northbridge/amd/agesa/family15rl/northbridge.c index d322fdcdbc..0a1e7d3bd8 100644 --- a/src/northbridge/amd/agesa/family15rl/northbridge.c +++ b/src/northbridge/amd/agesa/family15rl/northbridge.c @@ -992,7 +992,7 @@ static void add_more_links(struct device *dev, unsigned total_links) last->next = NULL; } -static u32 cpu_bus_scan(device_t dev, u32 passthru) +static void cpu_bus_scan(device_t dev) { struct bus *cpu_bus; device_t dev_mc; @@ -1166,7 +1166,6 @@ static u32 cpu_bus_scan(device_t dev, u32 passthru) amd_cpu_topology(cpu, i, j); } //j } - return passthru; } static void cpu_bus_init(struct device *dev) diff --git a/src/northbridge/amd/agesa/family15tn/northbridge.c b/src/northbridge/amd/agesa/family15tn/northbridge.c index 08287dc8e2..37b6a8e276 100644 --- a/src/northbridge/amd/agesa/family15tn/northbridge.c +++ b/src/northbridge/amd/agesa/family15tn/northbridge.c @@ -991,7 +991,7 @@ static void add_more_links(device_t dev, unsigned total_links) last->next = NULL; } -static u32 cpu_bus_scan(device_t dev, u32 passthru) +static void cpu_bus_scan(device_t dev) { struct bus *cpu_bus; device_t dev_mc; @@ -1165,7 +1165,6 @@ static u32 cpu_bus_scan(device_t dev, u32 passthru) amd_cpu_topology(cpu, i, j); } //j } - return passthru; } static void cpu_bus_init(device_t dev) diff --git a/src/northbridge/amd/agesa/family16kb/northbridge.c b/src/northbridge/amd/agesa/family16kb/northbridge.c index 7c603c02c0..9bbc2794dd 100644 --- a/src/northbridge/amd/agesa/family16kb/northbridge.c +++ b/src/northbridge/amd/agesa/family16kb/northbridge.c @@ -1008,7 +1008,7 @@ static void add_more_links(device_t dev, unsigned total_links) last->next = NULL; } -static u32 cpu_bus_scan(device_t dev, u32 passthru) +static void cpu_bus_scan(device_t dev) { struct bus *cpu_bus; device_t dev_mc; @@ -1182,7 +1182,6 @@ static u32 cpu_bus_scan(device_t dev, u32 passthru) amd_cpu_topology(cpu, i, j); } //j } - return passthru; } static void cpu_bus_init(device_t dev) diff --git a/src/northbridge/amd/amdfam10/northbridge.c b/src/northbridge/amd/amdfam10/northbridge.c index ff36bf5cff..4734522b70 100644 --- a/src/northbridge/amd/amdfam10/northbridge.c +++ b/src/northbridge/amd/amdfam10/northbridge.c @@ -285,7 +285,7 @@ static u32 amdfam10_scan_chain(device_t dev, u32 nodeid, struct bus *link, bool return link->subordinate; } -static unsigned amdfam10_scan_chains(device_t dev, unsigned unused) +static void amdfam10_scan_chains(device_t dev) { unsigned nodeid; struct bus *link; @@ -310,8 +310,6 @@ static unsigned amdfam10_scan_chains(device_t dev, unsigned unused) } dev->bus->subordinate = max; - - return unused; } @@ -912,7 +910,7 @@ static void amdfam10_domain_set_resources(device_t dev) } } -static u32 amdfam10_domain_scan_bus(device_t dev, u32 unused) +static void amdfam10_domain_scan_bus(device_t dev) { u32 reg; int i; @@ -949,7 +947,6 @@ static u32 amdfam10_domain_scan_bus(device_t dev, u32 unused) pci_write_config32(f0_dev, HT_TRANSACTION_CONTROL, httc); } } - return unused; } #if IS_ENABLED(CONFIG_GENERATE_SMBIOS_TABLES) @@ -1214,7 +1211,7 @@ static void add_more_links(device_t dev, unsigned total_links) last->next = NULL; } -static u32 cpu_bus_scan(device_t dev, u32 passthru) +static void cpu_bus_scan(device_t dev) { struct bus *cpu_bus; device_t dev_mc; @@ -1383,7 +1380,6 @@ static u32 cpu_bus_scan(device_t dev, u32 passthru) amd_cpu_topology(cpu, i, j); } //j } - return passthru; } static void cpu_bus_init(device_t dev) diff --git a/src/northbridge/amd/amdk8/northbridge.c b/src/northbridge/amd/amdk8/northbridge.c index 63a25abff3..45cff9e71a 100644 --- a/src/northbridge/amd/amdk8/northbridge.c +++ b/src/northbridge/amd/amdk8/northbridge.c @@ -241,7 +241,7 @@ static u32 amdk8_scan_chain(device_t dev, u32 nodeid, struct bus *link, bool is_ return link->subordinate; } -static unsigned amdk8_scan_chains(device_t dev, unsigned unused) +static void amdk8_scan_chains(device_t dev) { unsigned nodeid; struct bus *link; @@ -268,8 +268,6 @@ static unsigned amdk8_scan_chains(device_t dev, unsigned unused) } dev->bus->subordinate = max; - - return unused; } @@ -1095,7 +1093,7 @@ static void amdk8_domain_set_resources(device_t dev) } -static u32 amdk8_domain_scan_bus(device_t dev, u32 unused) +static void amdk8_domain_scan_bus(device_t dev) { u32 reg; int i; @@ -1131,7 +1129,6 @@ static u32 amdk8_domain_scan_bus(device_t dev, u32 unused) pci_write_config32(f0_dev, HT_TRANSACTION_CONTROL, httc); } } - return unused; } static struct device_operations pci_domain_ops = { @@ -1180,7 +1177,7 @@ static void add_more_links(device_t dev, unsigned total_links) last->next = NULL; } -static u32 cpu_bus_scan(device_t dev, u32 passthru) +static void cpu_bus_scan(device_t dev) { struct bus *cpu_bus; device_t dev_mc; @@ -1319,7 +1316,6 @@ static u32 cpu_bus_scan(device_t dev, u32 passthru) amd_cpu_topology(cpu, i, j); } //j } - return passthru; } static void cpu_bus_init(device_t dev) diff --git a/src/northbridge/amd/pi/00630F01/northbridge.c b/src/northbridge/amd/pi/00630F01/northbridge.c index e0fc11eec8..60a1d49645 100644 --- a/src/northbridge/amd/pi/00630F01/northbridge.c +++ b/src/northbridge/amd/pi/00630F01/northbridge.c @@ -985,7 +985,7 @@ static void add_more_links(device_t dev, unsigned total_links) last->next = NULL; } -static u32 cpu_bus_scan(device_t dev, u32 passthru) +static void cpu_bus_scan(device_t dev) { struct bus *cpu_bus; device_t dev_mc; @@ -1176,7 +1176,6 @@ static u32 cpu_bus_scan(device_t dev, u32 passthru) amd_cpu_topology(cpu, i, j); } //j } - return passthru; } static void cpu_bus_init(device_t dev) diff --git a/src/northbridge/amd/pi/00730F01/northbridge.c b/src/northbridge/amd/pi/00730F01/northbridge.c index 71099d912f..8e340ce5c1 100644 --- a/src/northbridge/amd/pi/00730F01/northbridge.c +++ b/src/northbridge/amd/pi/00730F01/northbridge.c @@ -1001,7 +1001,7 @@ static void add_more_links(device_t dev, unsigned total_links) last->next = NULL; } -static u32 cpu_bus_scan(device_t dev, u32 passthru) +static void cpu_bus_scan(device_t dev) { struct bus *cpu_bus; device_t dev_mc; @@ -1187,7 +1187,6 @@ static u32 cpu_bus_scan(device_t dev, u32 passthru) amd_cpu_topology(cpu, i, j); } //j } - return passthru; } static void cpu_bus_init(device_t dev) diff --git a/src/northbridge/intel/i3100/pciexp_porta.c b/src/northbridge/intel/i3100/pciexp_porta.c index b37e3cff7d..a4be7a6825 100644 --- a/src/northbridge/intel/i3100/pciexp_porta.c +++ b/src/northbridge/intel/i3100/pciexp_porta.c @@ -45,7 +45,7 @@ static void pcie_init(struct device *dev) } -static unsigned int pcie_scan_bridge(struct device *dev, unsigned int max) +static void pcie_scan_bridge(struct device *dev) { u16 val; u16 ctl; @@ -62,7 +62,8 @@ static unsigned int pcie_scan_bridge(struct device *dev, unsigned int max) hard_reset(); } } while (val & (3<<10)); - return pciexp_scan_bridge(dev, max); + + pciexp_scan_bridge(dev); } static struct device_operations pcie_ops = { diff --git a/src/northbridge/intel/i3100/pciexp_porta_ep80579.c b/src/northbridge/intel/i3100/pciexp_porta_ep80579.c index 31cd29f73d..f7e3a6a50e 100644 --- a/src/northbridge/intel/i3100/pciexp_porta_ep80579.c +++ b/src/northbridge/intel/i3100/pciexp_porta_ep80579.c @@ -67,7 +67,7 @@ static void pcie_bus_enable_resources(struct device *dev) } -static unsigned int pcie_scan_bridge(struct device *dev, unsigned int max) +static void pcie_scan_bridge(struct device *dev) { u16 val; u16 ctl; @@ -84,7 +84,8 @@ static unsigned int pcie_scan_bridge(struct device *dev, unsigned int max) hard_reset(); } } while (val & (3<<10)); - return pciexp_scan_bridge(dev, max); + + pciexp_scan_bridge(dev); } static struct device_operations pcie_ops = { -- cgit v1.2.3