From 577f185d382c8130f20f0ee7e8466ed8bbebbacc Mon Sep 17 00:00:00 2001 From: "arch import user (historical)" Date: Wed, 6 Jul 2005 17:11:02 +0000 Subject: Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-29 Creator: Hamish Guthrie Added NSC pc97317 super-io and added fill character option to config/Options.lb to speed up flash programming git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1945 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/northbridge/amd/gx1/raminit.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) (limited to 'src/northbridge') diff --git a/src/northbridge/amd/gx1/raminit.c b/src/northbridge/amd/gx1/raminit.c index c4c29e9d97..365a18fa60 100644 --- a/src/northbridge/amd/gx1/raminit.c +++ b/src/northbridge/amd/gx1/raminit.c @@ -46,12 +46,12 @@ void do_refresh(void) { unsigned int tval, i; - post_code(0x71); + outb(0x71, 0x80); tval = getGX1Mem(GX_BASE + MC_MEM_CNTRL1); tval |= RFSHTST; for(i=0; i>NUM_REFRESH; i++) setGX1Mem(GX_BASE + MC_MEM_CNTRL1, tval); - post_code(0x72); + outb(0x72, 0x80); } @@ -59,7 +59,7 @@ void enable_dimm(void) { unsigned int tval, i; - post_code(0x73); + outb(0x73, 0x80); /* start SDCLCK's */ tval = getGX1Mem(GX_BASE + MC_MEM_CNTRL1); @@ -101,7 +101,7 @@ unsigned int tval, i; for(i=0; i<2000; i++) outb(0, 0xed); - post_code(0x74); + outb(0x74, 0x80); } static unsigned int size_dimm(int dimm_shift) @@ -321,7 +321,7 @@ static void sdram_init(void) unsigned int mem_config = 0x00700070; print_debug("Setting up default parameters for memory\r\n"); - post_code(0x70); + outb(0x70, 0x80); setGX1Mem(GX_BASE + MC_MEM_CNTRL2, 0x000007d8); /* Disable all CLKS, Shift = 3 */ setGX1Mem(GX_BASE + MC_MEM_CNTRL1, 0x92140000); /* MD_DS=2, MA_DS=2, CNTL_DS=2 SDCLKRATE=4 */ @@ -350,5 +350,5 @@ unsigned int mem_config = 0x00700070; setGX1Mem(GX_BASE + MC_BANK_CFG, mem_config); enable_dimm(); - post_code(0x7e); + outb(0x7e, 0x80); } -- cgit v1.2.3