From 53508fedf8bbd49b10f39a18b3bad6b25b71242e Mon Sep 17 00:00:00 2001 From: Marc Jones Date: Wed, 11 Jul 2012 16:30:28 -0600 Subject: pei_data.h: Fix comment I added a comment to the pei_data.h to remind users about how the OC pins are mapped. Change-Id: I4d74eb69fc78816a69e61260c2c9b2b3e58cafec Signed-off-by: Marc Jones Reviewed-on: http://review.coreboot.org/1824 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth Reviewed-by: Ronald G. Minnich --- src/northbridge/intel/sandybridge/pei_data.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'src/northbridge') diff --git a/src/northbridge/intel/sandybridge/pei_data.h b/src/northbridge/intel/sandybridge/pei_data.h index 5bb3b38a13..34adddc291 100644 --- a/src/northbridge/intel/sandybridge/pei_data.h +++ b/src/northbridge/intel/sandybridge/pei_data.h @@ -79,6 +79,9 @@ struct pei_data * [1] = overcurrent pin * [2] = length * + * Ports 0-7 can be mapped to OC0-OC3 + * Ports 8-13 can be mapped to OC4-OC7 + * * Port Length * MOBILE: * < 0x050 = Setting 1 (back panel, 1-5in, lowest tx amplitude) -- cgit v1.2.3