From 47bf4986815407393c1cf02922c882ed0f336bb2 Mon Sep 17 00:00:00 2001 From: Nico Huber Date: Sun, 17 Nov 2019 02:58:00 +0100 Subject: nb/intel/sandybridge/mrc: Handle P2P disabling via devicetree Some Sandy Bridge boards disabled the PCI-to-PCI bridge early to avoid probing by the MRC. We can do that for all boards instead, based on the devicetree setting. Change-Id: Ie64774628fde77db2a379bdba6a921a31e52fa0d Signed-off-by: Nico Huber Reviewed-on: https://review.coreboot.org/c/coreboot/+/36903 Tested-by: build bot (Jenkins) Reviewed-by: Arthur Heymans --- src/northbridge/intel/sandybridge/raminit_mrc.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) (limited to 'src/northbridge') diff --git a/src/northbridge/intel/sandybridge/raminit_mrc.c b/src/northbridge/intel/sandybridge/raminit_mrc.c index a8acfbf980..29c766a59f 100644 --- a/src/northbridge/intel/sandybridge/raminit_mrc.c +++ b/src/northbridge/intel/sandybridge/raminit_mrc.c @@ -18,6 +18,7 @@ #include #include #include +#include #include #include #include @@ -382,6 +383,16 @@ static void devicetree_fill_pei_data(struct pei_data *pei_data) pei_data->usb3.xhci_streams = cfg->usb3.xhci_streams; } +static void disable_p2p(void) +{ + /* Disable PCI-to-PCI bridge early to prevent probing by MRC. */ + const struct device *const p2p = pcidev_on_root(0x1e, 0); + if (p2p && p2p->enabled) + return; + + RCBA32(FD) |= PCH_DISABLE_P2P; +} + void perform_raminit(int s3resume) { int cbmem_was_initted; @@ -423,6 +434,8 @@ void perform_raminit(int s3resume) } } + disable_p2p(); + pei_data.boot_mode = s3resume ? 2 : 0; timestamp_add_now(TS_BEFORE_INITRAM); sdram_initialize(&pei_data); -- cgit v1.2.3