From 29cc9eda2021a87396ef31a6fc81daff6fd1be7a Mon Sep 17 00:00:00 2001 From: Myles Watson Date: Thu, 2 Jul 2009 18:56:24 +0000 Subject: Move the v3 resource allocator to v2. Major changes: 1. Separate resource allocation into: A. Read Resources B. Avoid fixed resources (constrain limits) C. Allocate resources D. Set resources Usage notes: Resources which have IORESOURCE_FIXED set in the flags constrain the placement of other resources. All fixed resources will end up outside (above or below) the allocated resources. Domains usually start with base = 0 and limit = 2^address_bits - 1. I've added an IOAPIC to all platforms so that the old limit of 0xfec00000 is still there for resources. Some platforms may want to change that, but I didn't want to break anyone's board. Resources are allocated in a single block for memory and another for I/O. Currently the resource allocator doesn't support holes. Signed-off-by: Myles Watson Acked-by: Ronald G. Minnich Acked-by: Patrick Georgi git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4394 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/northbridge/amd/amdfam10/northbridge.c | 60 ++++--------- src/northbridge/amd/amdk8/misc_control.c | 2 +- src/northbridge/amd/amdk8/northbridge.c | 97 +++++++--------------- src/northbridge/amd/gx1/northbridge.c | 27 ------ src/northbridge/amd/gx2/northbridge.c | 25 ------ src/northbridge/amd/lx/northbridge.c | 28 ------- src/northbridge/ibm/cpc710/cpc710_northbridge.c | 24 ------ src/northbridge/ibm/cpc925/cpc925_northbridge.c | 24 ------ src/northbridge/intel/e7501/northbridge.c | 23 ----- src/northbridge/intel/e7520/northbridge.c | 41 ++------- src/northbridge/intel/e7525/northbridge.c | 43 ++-------- src/northbridge/intel/i3100/northbridge.c | 35 +------- src/northbridge/intel/i440bx/northbridge.c | 28 +------ src/northbridge/intel/i82810/northbridge.c | 27 ------ src/northbridge/intel/i82830/northbridge.c | 25 ------ src/northbridge/intel/i855gme/northbridge.c | 24 ------ src/northbridge/intel/i855pm/northbridge.c | 23 ----- src/northbridge/intel/i945/northbridge.c | 32 +------ .../motorola/mpc107/mpc107_northbridge.c | 11 +-- src/northbridge/via/cn400/northbridge.c | 22 ++--- src/northbridge/via/cn700/northbridge.c | 29 ------- src/northbridge/via/cx700/cx700_lpc.c | 17 ++-- src/northbridge/via/cx700/northbridge.c | 21 ----- src/northbridge/via/vt8601/northbridge.c | 23 ----- src/northbridge/via/vt8623/northbridge.c | 32 ------- src/northbridge/via/vx800/northbridge.c | 29 ------- 26 files changed, 92 insertions(+), 680 deletions(-) (limited to 'src/northbridge') diff --git a/src/northbridge/amd/amdfam10/northbridge.c b/src/northbridge/amd/amdfam10/northbridge.c index fa7cb6db00..75521b7ac5 100644 --- a/src/northbridge/amd/amdfam10/northbridge.c +++ b/src/northbridge/amd/amdfam10/northbridge.c @@ -341,7 +341,7 @@ static int reg_useable(u32 reg,device_t goal_dev, u32 goal_nodeid, if (!dev) continue; for(link = 0; !res && (link < 8); link++) { - res = probe_resource(dev, 0x1000 + reg + (link<<16)); // 8 links, 0x1000 man f1, + res = probe_resource(dev, IOINDEX(0x1000 + reg, link)); } } result = 2; @@ -385,7 +385,7 @@ static struct resource *amdfam10_find_iopair(device_t dev, u32 nodeid, u32 link) reg = 0x110+ (index<<24) + (4<<20); // index could be 0, 255 } - resource = new_resource(dev, 0x1000 + reg + (link<<16)); + resource = new_resource(dev, IOINDEX(0x1000 + reg, link)); return resource; } @@ -421,7 +421,7 @@ static struct resource *amdfam10_find_mempair(device_t dev, u32 nodeid, u32 link reg = 0x110+ (index<<24) + (6<<20); // index could be 0, 63 } - resource = new_resource(dev, 0x1000 + reg + (link<<16)); + resource = new_resource(dev, IOINDEX(0x1000 + reg, link)); return resource; } @@ -447,8 +447,6 @@ static void amdfam10_link_read_bases(device_t dev, u32 nodeid, u32 link) resource->gran = align; resource->limit = 0xffffUL; resource->flags = IORESOURCE_IO; - compute_allocate_resource(&dev->link[link], resource, - IORESOURCE_IO, IORESOURCE_IO); } /* Initialize the prefetchable memory constraints on the current bus */ @@ -460,9 +458,6 @@ static void amdfam10_link_read_bases(device_t dev, u32 nodeid, u32 link) resource->gran = log2(HT_MEM_HOST_ALIGN); resource->limit = 0xffffffffffULL; resource->flags = IORESOURCE_MEM | IORESOURCE_PREFETCH; - compute_allocate_resource(&dev->link[link], resource, - IORESOURCE_MEM | IORESOURCE_PREFETCH, - IORESOURCE_MEM | IORESOURCE_PREFETCH); #if CONFIG_EXT_CONF_SUPPORT == 1 if((resource->index & 0x1fff) == 0x1110) { // ext @@ -481,9 +476,6 @@ static void amdfam10_link_read_bases(device_t dev, u32 nodeid, u32 link) resource->gran = log2(HT_MEM_HOST_ALIGN); resource->limit = 0xffffffffffULL; resource->flags = IORESOURCE_MEM; - compute_allocate_resource(&dev->link[link], resource, - IORESOURCE_MEM | IORESOURCE_PREFETCH, - IORESOURCE_MEM); #if CONFIG_EXT_CONF_SUPPORT == 1 if((resource->index & 0x1fff) == 0x1110) { // ext @@ -541,19 +533,14 @@ static void amdfam10_set_resource(device_t dev, struct resource *resource, /* Get the register and link */ reg = resource->index & 0xfff; // 4k - link = ( resource->index>> 16)& 0x7; // 8 links + link = IOINDEX_LINK(resource->index); if (resource->flags & IORESOURCE_IO) { - compute_allocate_resource(&dev->link[link], resource, - IORESOURCE_IO, IORESOURCE_IO); set_io_addr_reg(dev, nodeid, link, reg, rbase>>8, rend>>8); store_conf_io_addr(nodeid, link, reg, (resource->index >> 24), rbase>>8, rend>>8); } else if (resource->flags & IORESOURCE_MEM) { - compute_allocate_resource(&dev->link[link], resource, - IORESOURCE_MEM | IORESOURCE_PREFETCH, - resource->flags & (IORESOURCE_MEM | IORESOURCE_PREFETCH)); set_mmio_addr_reg(nodeid, link, reg, (resource->index >>24), rbase>>8, rend>>8, sysconf.nodes) ;// [39:8] store_conf_mmio_addr(nodeid, link, reg, (resource->index >>24), rbase>>8, rend>>8); } @@ -657,7 +644,7 @@ struct chip_operations northbridge_amd_amdfam10_ops = { .enable_dev = 0, }; -static void pci_domain_read_resources(device_t dev) +static void amdfam10_domain_read_resources(device_t dev) { struct resource *resource; unsigned reg; @@ -672,20 +659,20 @@ static void pci_domain_read_resources(device_t dev) /* Is this register allocated? */ if ((base & 3) != 0) { unsigned nodeid, link; - device_t dev; + device_t reg_dev; if(reg<0xc0) { // mmio nodeid = (limit & 0xf) + (base&0x30); } else { // io nodeid = (limit & 0xf) + ((base>>4)&0x30); } link = (limit >> 4) & 7; - dev = __f0_dev[nodeid]; - if (dev) { - /* Reserve the resource */ - struct resource *resource; - resource = new_resource(dev, 0x1000 + reg + (link<<16)); - if (resource) { - resource->flags = 1; + reg_dev = __f0_dev[nodeid]; + if (reg_dev) { + /* Reserve the resource */ + struct resource *reg_resource; + reg_resource = new_resource(reg_dev, IOINDEX(0x1000 + reg, link)); + if (reg_resource) { + reg_resource->flags = 1; } } } @@ -711,24 +698,16 @@ static void pci_domain_read_resources(device_t dev) resource->base = 0x400; resource->limit = 0xffffUL; resource->flags = IORESOURCE_IO; - compute_allocate_resource(&dev->link[link], resource, - IORESOURCE_IO, IORESOURCE_IO); /* Initialize the system wide prefetchable memory resources constraints */ resource = new_resource(dev, 1|(link<<2)); resource->limit = 0xfcffffffffULL; resource->flags = IORESOURCE_MEM | IORESOURCE_PREFETCH; - compute_allocate_resource(&dev->link[link], resource, - IORESOURCE_MEM | IORESOURCE_PREFETCH, - IORESOURCE_MEM | IORESOURCE_PREFETCH); /* Initialize the system wide memory resources constraints */ resource = new_resource(dev, 2|(link<<2)); resource->limit = 0xfcffffffffULL; resource->flags = IORESOURCE_MEM; - compute_allocate_resource(&dev->link[link], resource, - IORESOURCE_MEM | IORESOURCE_PREFETCH, - IORESOURCE_MEM); } #endif } @@ -770,10 +749,6 @@ static u32 find_pci_tolm(struct bus *bus, u32 tolm) return tolm; } -#if CONFIG_PCI_64BIT_PREF_MEM == 1 -#define BRIDGE_IO_MASK (IORESOURCE_IO | IORESOURCE_MEM | IORESOURCE_PREFETCH) -#endif - #if CONFIG_HW_MEM_HOLE_SIZEK != 0 struct hw_mem_hole_info { @@ -980,9 +955,6 @@ static void pci_domain_set_resources(device_t dev) resource->flags |= IORESOURCE_ASSIGNED; resource->flags &= ~IORESOURCE_STORED; link = (resource>>2) & 3; - compute_allocate_resource(&dev->link[link], resource, - BRIDGE_IO_MASK, resource->flags & BRIDGE_IO_MASK); - resource->flags |= IORESOURCE_STORED; report_resource_stored(dev, resource, ""); @@ -1142,7 +1114,7 @@ static void pci_domain_set_resources(device_t dev) } } -static u32 pci_domain_scan_bus(device_t dev, u32 max) +static u32 amdfam10_domain_scan_bus(device_t dev, u32 max) { u32 reg; int i; @@ -1192,11 +1164,11 @@ static u32 pci_domain_scan_bus(device_t dev, u32 max) } static struct device_operations pci_domain_ops = { - .read_resources = pci_domain_read_resources, + .read_resources = amdfam10_domain_read_resources, .set_resources = pci_domain_set_resources, .enable_resources = enable_childrens_resources, .init = 0, - .scan_bus = pci_domain_scan_bus, + .scan_bus = amdfam10_domain_scan_bus, #if CONFIG_MMCONF_SUPPORT_DEFAULT .ops_pci_bus = &pci_ops_mmconf, #else diff --git a/src/northbridge/amd/amdk8/misc_control.c b/src/northbridge/amd/amdk8/misc_control.c index 7c35082705..efb44473a4 100644 --- a/src/northbridge/amd/amdk8/misc_control.c +++ b/src/northbridge/amd/amdk8/misc_control.c @@ -53,7 +53,7 @@ static void mcf3_read_resources(device_t dev) if (iommu) { /* Add a Gart apeture resource */ resource = new_resource(dev, 0x94); - resource->size = iommu?CONFIG_AGP_APERTURE_SIZE:1; + resource->size = CONFIG_AGP_APERTURE_SIZE; resource->align = log2(resource->size); resource->gran = log2(resource->size); resource->limit = 0xffffffff; /* 4G */ diff --git a/src/northbridge/amd/amdk8/northbridge.c b/src/northbridge/amd/amdk8/northbridge.c index c51bc21b03..c07fdfcbcc 100644 --- a/src/northbridge/amd/amdk8/northbridge.c +++ b/src/northbridge/amd/amdk8/northbridge.c @@ -297,7 +297,7 @@ static int reg_useable(unsigned reg, if (!dev) continue; for(link = 0; !res && (link < 3); link++) { - res = probe_resource(dev, 0x100 + (reg | link)); + res = probe_resource(dev, IOINDEX(0x100 + reg, link)); } } result = 2; @@ -335,7 +335,7 @@ static struct resource *amdk8_find_iopair(device_t dev, unsigned nodeid, unsigne reg = free_reg; } if (reg > 0) { - resource = new_resource(dev, 0x100 + (reg | link)); + resource = new_resource(dev, IOINDEX(0x100 + reg, link)); } return resource; } @@ -362,7 +362,7 @@ static struct resource *amdk8_find_mempair(device_t dev, unsigned nodeid, unsign reg = free_reg; } if (reg > 0) { - resource = new_resource(dev, 0x100 + (reg | link)); + resource = new_resource(dev, IOINDEX(0x100 + reg, link)); } return resource; } @@ -379,9 +379,7 @@ static void amdk8_link_read_bases(device_t dev, unsigned nodeid, unsigned link) resource->align = log2(HT_IO_HOST_ALIGN); resource->gran = log2(HT_IO_HOST_ALIGN); resource->limit = 0xffffUL; - resource->flags = IORESOURCE_IO; - compute_allocate_resource(&dev->link[link], resource, - IORESOURCE_IO, IORESOURCE_IO); + resource->flags = IORESOURCE_IO | IORESOURCE_BRIDGE; } /* Initialize the prefetchable memory constraints on the current bus */ @@ -393,9 +391,9 @@ static void amdk8_link_read_bases(device_t dev, unsigned nodeid, unsigned link) resource->gran = log2(HT_MEM_HOST_ALIGN); resource->limit = 0xffffffffffULL; resource->flags = IORESOURCE_MEM | IORESOURCE_PREFETCH; - compute_allocate_resource(&dev->link[link], resource, - IORESOURCE_MEM | IORESOURCE_PREFETCH, - IORESOURCE_MEM | IORESOURCE_PREFETCH); +#ifdef CONFIG_PCI_64BIT_PREF_MEM + resource->flags |= IORESOURCE_BRIDGE; +#endif } /* Initialize the memory constraints on the current bus */ @@ -405,11 +403,8 @@ static void amdk8_link_read_bases(device_t dev, unsigned nodeid, unsigned link) resource->size = 0; resource->align = log2(HT_MEM_HOST_ALIGN); resource->gran = log2(HT_MEM_HOST_ALIGN); - resource->limit = 0xffffffffffULL; - resource->flags = IORESOURCE_MEM; - compute_allocate_resource(&dev->link[link], resource, - IORESOURCE_MEM | IORESOURCE_PREFETCH, - IORESOURCE_MEM); + resource->limit = 0xffffffffULL; + resource->flags = IORESOURCE_MEM | IORESOURCE_BRIDGE; } } @@ -432,11 +427,15 @@ static void amdk8_set_resource(device_t dev, struct resource *resource, unsigned /* Make certain the resource has actually been set */ if (!(resource->flags & IORESOURCE_ASSIGNED)) { + printk_err("%s: can't set unassigned resource @%lx %lx\n", + __func__, resource->index, resource->flags); return; } /* If I have already stored this resource don't worry about it */ if (resource->flags & IORESOURCE_STORED) { + printk_err("%s: can't set stored resource @%lx %lx\n", __func__, + resource->index, resource->flags); return; } @@ -448,6 +447,10 @@ static void amdk8_set_resource(device_t dev, struct resource *resource, unsigned if (resource->index < 0x100) { return; } + + if (resource->size == 0) + return; + /* Get the base address */ rbase = resource->base; @@ -456,12 +459,10 @@ static void amdk8_set_resource(device_t dev, struct resource *resource, unsigned /* Get the register and link */ reg = resource->index & 0xfc; - link = resource->index & 3; + link = IOINDEX_LINK(resource->index); if (resource->flags & IORESOURCE_IO) { uint32_t base, limit; - compute_allocate_resource(&dev->link[link], resource, - IORESOURCE_IO, IORESOURCE_IO); base = f1_read_config32(reg); limit = f1_read_config32(reg + 0x4); base &= 0xfe000fcc; @@ -486,9 +487,6 @@ static void amdk8_set_resource(device_t dev, struct resource *resource, unsigned } else if (resource->flags & IORESOURCE_MEM) { uint32_t base, limit; - compute_allocate_resource(&dev->link[link], resource, - IORESOURCE_MEM | IORESOURCE_PREFETCH, - resource->flags & (IORESOURCE_MEM | IORESOURCE_PREFETCH)); base = f1_read_config32(reg); limit = f1_read_config32(reg + 0x4); base &= 0x000000f0; @@ -634,7 +632,7 @@ struct chip_operations northbridge_amd_amdk8_ops = { .enable_dev = 0, }; -static void pci_domain_read_resources(device_t dev) +static void amdk8_domain_read_resources(device_t dev) { struct resource *resource; unsigned reg; @@ -655,48 +653,21 @@ static void pci_domain_read_resources(device_t dev) if (reg_dev) { /* Reserve the resource */ struct resource *reg_resource; - reg_resource = new_resource(reg_dev, 0x100 + (reg | link)); + reg_resource = new_resource(reg_dev, IOINDEX(0x100 + reg, link)); if (reg_resource) { reg_resource->flags = 1; } } } } -#if CONFIG_PCI_64BIT_PREF_MEM == 0 - /* Initialize the system wide io space constraints */ - resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0)); - resource->base = 0x400; - resource->limit = 0xffffUL; - resource->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED; - - /* Initialize the system wide memory resources constraints */ - resource = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0)); - resource->limit = 0xfcffffffffULL; - resource->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED; -#else - /* Initialize the system wide io space constraints */ - resource = new_resource(dev, 0); - resource->base = 0x400; - resource->limit = 0xffffUL; - resource->flags = IORESOURCE_IO; - compute_allocate_resource(&dev->link[0], resource, - IORESOURCE_IO, IORESOURCE_IO); - /* Initialize the system wide prefetchable memory resources constraints */ - resource = new_resource(dev, 1); - resource->limit = 0xfcffffffffULL; - resource->flags = IORESOURCE_MEM | IORESOURCE_PREFETCH; - compute_allocate_resource(&dev->link[0], resource, - IORESOURCE_MEM | IORESOURCE_PREFETCH, - IORESOURCE_MEM | IORESOURCE_PREFETCH); + pci_domain_read_resources(dev); - /* Initialize the system wide memory resources constraints */ +#if CONFIG_PCI_64BIT_PREF_MEM == 1 + /* Initialize the system wide prefetchable memory resources constraints */ resource = new_resource(dev, 2); resource->limit = 0xfcffffffffULL; - resource->flags = IORESOURCE_MEM; - compute_allocate_resource(&dev->link[0], resource, - IORESOURCE_MEM | IORESOURCE_PREFETCH, - IORESOURCE_MEM); + resource->flags = IORESOURCE_MEM | IORESOURCE_PREFETCH; #endif } @@ -739,10 +710,6 @@ static uint32_t find_pci_tolm(struct bus *bus) return tolm; } -#if CONFIG_PCI_64BIT_PREF_MEM == 1 -#define BRIDGE_IO_MASK (IORESOURCE_IO | IORESOURCE_MEM | IORESOURCE_PREFETCH) -#endif - #if CONFIG_HW_MEM_HOLE_SIZEK != 0 struct hw_mem_hole_info { @@ -898,7 +865,7 @@ static uint32_t hoist_memory(unsigned long hole_startk, int i) extern uint64_t high_tables_base, high_tables_size; #endif -static void pci_domain_set_resources(device_t dev) +static void amdk8_domain_set_resources(device_t dev) { #if CONFIG_PCI_64BIT_PREF_MEM == 1 struct resource *io, *mem1, *mem2; @@ -964,13 +931,7 @@ static void pci_domain_set_resources(device_t dev) last = &dev->resource[dev->resources]; for(resource = &dev->resource[0]; resource < last; resource++) { -#if 1 resource->flags |= IORESOURCE_ASSIGNED; - resource->flags &= ~IORESOURCE_STORED; -#endif - compute_allocate_resource(&dev->link[0], resource, - BRIDGE_IO_MASK, resource->flags & BRIDGE_IO_MASK); - resource->flags |= IORESOURCE_STORED; report_resource_stored(dev, resource, ""); @@ -1125,7 +1086,7 @@ static void pci_domain_set_resources(device_t dev) } -static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max) +static unsigned int amdk8_domain_scan_bus(device_t dev, unsigned int max) { unsigned reg; int i; @@ -1160,11 +1121,11 @@ static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max) } static struct device_operations pci_domain_ops = { - .read_resources = pci_domain_read_resources, - .set_resources = pci_domain_set_resources, + .read_resources = amdk8_domain_read_resources, + .set_resources = amdk8_domain_set_resources, .enable_resources = enable_childrens_resources, .init = 0, - .scan_bus = pci_domain_scan_bus, + .scan_bus = amdk8_domain_scan_bus, .ops_pci_bus = &pci_cf8_conf1, }; diff --git a/src/northbridge/amd/gx1/northbridge.c b/src/northbridge/amd/gx1/northbridge.c index 2c578d0671..d8e80c247f 100644 --- a/src/northbridge/amd/gx1/northbridge.c +++ b/src/northbridge/amd/gx1/northbridge.c @@ -66,27 +66,6 @@ static const struct pci_driver northbridge_driver __pci_driver = { .device = PCI_DEVICE_ID_CYRIX_PCI_MASTER, }; - - -#define BRIDGE_IO_MASK (IORESOURCE_IO | IORESOURCE_MEM) - -static void pci_domain_read_resources(device_t dev) -{ - struct resource *resource; - - printk_spew("%s:%s()\n", NORTHBRIDGE_FILE, __func__); - - /* Initialize the system wide io space constraints */ - resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0,0)); - resource->limit = 0xffffUL; - resource->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED; - - /* Initialize the system wide memory resources constraints */ - resource = new_resource(dev, IOINDEX_SUBTRACTIVE(1,0)); - resource->limit = 0xffffffffULL; - resource->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED; -} - static void ram_resource(device_t dev, unsigned long index, unsigned long basek, unsigned long sizek) { @@ -187,12 +166,6 @@ static void pci_domain_set_resources(device_t dev) assign_resources(&dev->link[0]); } -static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max) -{ - max = pci_scan_bus(&dev->link[0], PCI_DEVFN(0, 0), 0xff, max); - return max; -} - static struct device_operations pci_domain_ops = { .read_resources = pci_domain_read_resources, .set_resources = pci_domain_set_resources, diff --git a/src/northbridge/amd/gx2/northbridge.c b/src/northbridge/amd/gx2/northbridge.c index f3a638ca5a..52851cfcc9 100644 --- a/src/northbridge/amd/gx2/northbridge.c +++ b/src/northbridge/amd/gx2/northbridge.c @@ -356,25 +356,6 @@ static const struct pci_driver northbridge_driver __pci_driver = { .device = PCI_DEVICE_ID_NS_GX2, }; -#define BRIDGE_IO_MASK (IORESOURCE_IO | IORESOURCE_MEM) - -static void pci_domain_read_resources(device_t dev) -{ - struct resource *resource; - - printk_spew("%s:%s()\n", NORTHBRIDGE_FILE, __func__); - - /* Initialize the system wide io space constraints */ - resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0,0)); - resource->limit = 0xffffUL; - resource->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED; - - /* Initialize the system wide memory resources constraints */ - resource = new_resource(dev, IOINDEX_SUBTRACTIVE(1,0)); - resource->limit = 0xffffffffULL; - resource->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED; -} - static void ram_resource(device_t dev, unsigned long index, unsigned long basek, unsigned long sizek) { @@ -468,12 +449,6 @@ static void pci_domain_set_resources(device_t dev) assign_resources(&dev->link[0]); } -static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max) -{ - max = pci_scan_bus(&dev->link[0], PCI_DEVFN(0, 0), 0xff, max); - return max; -} - static struct device_operations pci_domain_ops = { .read_resources = pci_domain_read_resources, .set_resources = pci_domain_set_resources, diff --git a/src/northbridge/amd/lx/northbridge.c b/src/northbridge/amd/lx/northbridge.c index c765377054..b2670843f5 100644 --- a/src/northbridge/amd/lx/northbridge.c +++ b/src/northbridge/amd/lx/northbridge.c @@ -74,8 +74,6 @@ #define IOD_BM(msr, pdid1, bizarro, ibase, imask) {msr, {.hi=(pdid1<<29)|(bizarro<<28)|(ibase>>12), .lo=(ibase<<20)|imask}} #define IOD_SC(msr, pdid1, bizarro, en, wen, ren, ibase) {msr, {.hi=(pdid1<<29)|(bizarro<<28), .lo=(en<<24)|(wen<<21)|(ren<<20)|(ibase<<3)}} -#define BRIDGE_IO_MASK (IORESOURCE_IO | IORESOURCE_MEM) - extern void graphics_init(void); extern void cpubug(void); extern void chipsetinit(void); @@ -382,24 +380,6 @@ static const struct pci_driver northbridge_driver __pci_driver = { .device = PCI_DEVICE_ID_AMD_LXBRIDGE, }; -static void pci_domain_read_resources(device_t dev) -{ - struct resource *resource; - printk_spew(">> Entering northbridge.c: %s\n", __func__); - - /* Initialize the system wide io space constraints */ - resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0)); - resource->limit = 0xffffUL; - resource->flags = - IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED; - - /* Initialize the system wide memory resources constraints */ - resource = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0)); - resource->limit = 0xffffffffULL; - resource->flags = - IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED; -} - static void ram_resource(device_t dev, unsigned long index, unsigned long basek, unsigned long sizek) { @@ -470,14 +450,6 @@ static void pci_domain_enable(device_t dev) pci_set_method(dev); } -static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max) -{ - printk_spew(">> Entering northbridge.c: %s\n", __func__); - - max = pci_scan_bus(&dev->link[0], PCI_DEVFN(0, 0), 0xff, max); - return max; -} - static struct device_operations pci_domain_ops = { .read_resources = pci_domain_read_resources, .set_resources = pci_domain_set_resources, diff --git a/src/northbridge/ibm/cpc710/cpc710_northbridge.c b/src/northbridge/ibm/cpc710/cpc710_northbridge.c index d5f0cf30e8..889080f4d3 100644 --- a/src/northbridge/ibm/cpc710/cpc710_northbridge.c +++ b/src/northbridge/ibm/cpc710/cpc710_northbridge.c @@ -9,23 +9,6 @@ #include #include "chip.h" -static void pci_domain_read_resources(device_t dev) -{ - struct resource *resource; - - /* Initialize the system wide io space constraints */ - resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0)); - resource->base = 0; - resource->limit = 0xffffUL; - resource->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED; - - /* Initialize the system wide memory resources constraints */ - resource = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0)); - resource->base = 0x80000000ULL; - resource->limit = 0xfeffffffULL; /* We can put pci resources in the system controll area */ - resource->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED; -} - static void ram_resource(device_t dev, unsigned long index, unsigned long basek, unsigned long sizek) { @@ -53,13 +36,6 @@ static void pci_domain_set_resources(device_t dev) assign_resources(&dev->link[0]); } - -static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max) -{ - max = pci_scan_bus(&dev->link[0], PCI_DEVFN(0, 0), 0xff, max); - return max; -} - static struct device_operations pci_domain_ops = { .read_resources = pci_domain_read_resources, .set_resources = pci_domain_set_resources, diff --git a/src/northbridge/ibm/cpc925/cpc925_northbridge.c b/src/northbridge/ibm/cpc925/cpc925_northbridge.c index f8e6a0a81f..6c5533d7b2 100644 --- a/src/northbridge/ibm/cpc925/cpc925_northbridge.c +++ b/src/northbridge/ibm/cpc925/cpc925_northbridge.c @@ -9,23 +9,6 @@ #include #include "chip.h" -static void pci_domain_read_resources(device_t dev) -{ - struct resource *resource; - - /* Initialize the system wide io space constraints */ - resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0)); - resource->base = 0; - resource->limit = 0xffffUL; - resource->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED; - - /* Initialize the system wide memory resources constraints */ - resource = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0)); - resource->base = 0x80000000ULL; - resource->limit = 0xfeffffffULL; /* We can put pci resources in the system controll area */ - resource->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED; -} - static void ram_resource(device_t dev, unsigned long index, unsigned long basek, unsigned long sizek) { @@ -53,13 +36,6 @@ static void pci_domain_set_resources(device_t dev) assign_resources(&dev->link[0]); } - -static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max) -{ - max = pci_scan_bus(&dev->link[0], PCI_DEVFN(0, 0), 0xff, max); - return max; -} - static struct device_operations pci_domain_ops = { .read_resources = pci_domain_read_resources, .set_resources = pci_domain_set_resources, diff --git a/src/northbridge/intel/e7501/northbridge.c b/src/northbridge/intel/e7501/northbridge.c index 06a68e1e47..ee5f62f328 100644 --- a/src/northbridge/intel/e7501/northbridge.c +++ b/src/northbridge/intel/e7501/northbridge.c @@ -9,23 +9,6 @@ #include #include "chip.h" -static void pci_domain_read_resources(device_t dev) -{ - struct resource *resource; - unsigned reg; - - /* Initialize the system wide io space constraints */ - resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0)); - resource->base = 0x400; //yhlu - resource->limit = 0xffffUL; - resource->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED; - - /* Initialize the system wide memory resources constraints */ - resource = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0)); - resource->limit = 0xffffffffULL; - resource->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED; -} - static void ram_resource(device_t dev, unsigned long index, unsigned long basek, unsigned long sizek) { @@ -155,12 +138,6 @@ static void pci_domain_set_resources(device_t dev) assign_resources(&dev->link[0]); } -static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max) -{ - max = pci_scan_bus(&dev->link[0], PCI_DEVFN(0, 0), 0xff, max); - return max; -} - static struct device_operations pci_domain_ops = { .read_resources = pci_domain_read_resources, .set_resources = pci_domain_set_resources, diff --git a/src/northbridge/intel/e7520/northbridge.c b/src/northbridge/intel/e7520/northbridge.c index 47e6266aa6..da3d71b91f 100644 --- a/src/northbridge/intel/e7520/northbridge.c +++ b/src/northbridge/intel/e7520/northbridge.c @@ -28,30 +28,6 @@ static void ram_resource(device_t dev, unsigned long index, IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED; } - -static void pci_domain_read_resources(device_t dev) -{ - struct resource *resource; - - /* Initialize the system wide io space constraints */ - resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0,0)); - resource->base = 0; - resource->size = 0; - resource->align = 0; - resource->gran = 0; - resource->limit = 0xffffUL; - resource->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED; - - /* Initialize the system wide memory resources constraints */ - resource = new_resource(dev, IOINDEX_SUBTRACTIVE(1,0)); - resource->base = 0; - resource->size = 0; - resource->align = 0; - resource->gran = 0; - resource->limit = 0xffffffffUL; - resource->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED; -} - static void tolm_test(void *gp, struct device *dev, struct resource *new) { struct resource **best_p = gp; @@ -90,7 +66,7 @@ static void pci_domain_set_resources(device_t dev) #if 1 printk_debug("PCI mem marker = %x\n", pci_tolm); -#endif +#endif /* FIXME Me temporary hack */ if(pci_tolm > 0xe0000000) pci_tolm = 0xe0000000; @@ -122,7 +98,7 @@ static void pci_domain_set_resources(device_t dev) remapbasek = 0x3ff << 16; remaplimitk = 0 << 16; remapoffsetk = 0 << 16; - } + } else { /* The PCI memory hole overlaps memory * setup the remap window. @@ -165,7 +141,7 @@ static void pci_domain_set_resources(device_t dev) ram_resource(dev, 5, 4096*1024, tomk - 4*1024*1024); } if (remaplimitk >= remapbasek) { - ram_resource(dev, 6, remapbasek, + ram_resource(dev, 6, remapbasek, (remaplimitk + 64*1024) - remapbasek); } @@ -178,13 +154,10 @@ static void pci_domain_set_resources(device_t dev) assign_resources(&dev->link[0]); } -static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max) +static u32 e7520_domain_scan_bus(device_t dev, u32 max) { - max = pci_scan_bus(&dev->link[0], 0, 0xff, max); - if (max > max_bus) { - max_bus = max; - } - return max; + max_bus = pci_domain_scan_bus(dev, max); + return max_bus; } static struct device_operations pci_domain_ops = { @@ -192,7 +165,7 @@ static struct device_operations pci_domain_ops = { .set_resources = pci_domain_set_resources, .enable_resources = enable_childrens_resources, .init = 0, - .scan_bus = pci_domain_scan_bus, + .scan_bus = e7520_domain_scan_bus, .ops_pci_bus = &pci_cf8_conf1, /* Do we want to use the memory mapped space here? */ }; diff --git a/src/northbridge/intel/e7525/northbridge.c b/src/northbridge/intel/e7525/northbridge.c index 65404d6bf3..1963a0d83e 100644 --- a/src/northbridge/intel/e7525/northbridge.c +++ b/src/northbridge/intel/e7525/northbridge.c @@ -28,30 +28,6 @@ static void ram_resource(device_t dev, unsigned long index, IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED; } - -static void pci_domain_read_resources(device_t dev) -{ - struct resource *resource; - - /* Initialize the system wide io space constraints */ - resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0,0)); - resource->base = 0; - resource->size = 0; - resource->align = 0; - resource->gran = 0; - resource->limit = 0xffffUL; - resource->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED; - - /* Initialize the system wide memory resources constraints */ - resource = new_resource(dev, IOINDEX_SUBTRACTIVE(1,0)); - resource->base = 0; - resource->size = 0; - resource->align = 0; - resource->gran = 0; - resource->limit = 0xffffffffUL; - resource->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED; -} - static void tolm_test(void *gp, struct device *dev, struct resource *new) { struct resource **best_p = gp; @@ -90,7 +66,7 @@ static void pci_domain_set_resources(device_t dev) #if 1 printk_debug("PCI mem marker = %x\n", pci_tolm); -#endif +#endif /* FIXME Me temporary hack */ if(pci_tolm > 0xe0000000) pci_tolm = 0xe0000000; @@ -122,7 +98,7 @@ static void pci_domain_set_resources(device_t dev) remapbasek = 0x3ff << 16; remaplimitk = 0 << 16; remapoffsetk = 0 << 16; - } + } else { /* The PCI memory hole overlaps memory * setup the remap window. @@ -160,12 +136,12 @@ static void pci_domain_set_resources(device_t dev) /* Report the memory regions */ ram_resource(dev, 3, 0, 640); - ram_resource(dev, 4, 768, tolmk - 768); + ram_resource(dev, 4, 768, (tolmk - 768)); if (tomk > 4*1024*1024) { ram_resource(dev, 5, 4096*1024, tomk - 4*1024*1024); } if (remaplimitk >= remapbasek) { - ram_resource(dev, 6, remapbasek, + ram_resource(dev, 6, remapbasek, (remaplimitk + 64*1024) - remapbasek); } @@ -178,13 +154,10 @@ static void pci_domain_set_resources(device_t dev) assign_resources(&dev->link[0]); } -static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max) +static u32 e7525_domain_scan_bus(device_t dev, u32 max) { - max = pci_scan_bus(&dev->link[0], 0, 0xff, max); - if (max > max_bus) { - max_bus = max; - } - return max; + max_bus = pci_domain_scan_bus(dev, max); + return max_bus; } static struct device_operations pci_domain_ops = { @@ -192,7 +165,7 @@ static struct device_operations pci_domain_ops = { .set_resources = pci_domain_set_resources, .enable_resources = enable_childrens_resources, .init = 0, - .scan_bus = pci_domain_scan_bus, + .scan_bus = e7525_domain_scan_bus, .ops_pci_bus = &pci_cf8_conf1, /* Do we want to use the memory mapped space here? */ }; diff --git a/src/northbridge/intel/i3100/northbridge.c b/src/northbridge/intel/i3100/northbridge.c index 205e47db50..c96dcee8ba 100644 --- a/src/northbridge/intel/i3100/northbridge.c +++ b/src/northbridge/intel/i3100/northbridge.c @@ -49,30 +49,6 @@ static void ram_resource(device_t dev, u32 index, IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED; } - -static void pci_domain_read_resources(device_t dev) -{ - struct resource *resource; - - /* Initialize the system wide io space constraints */ - resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0,0)); - resource->base = 0; - resource->size = 0; - resource->align = 0; - resource->gran = 0; - resource->limit = 0xffffUL; - resource->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED; - - /* Initialize the system wide memory resources constraints */ - resource = new_resource(dev, IOINDEX_SUBTRACTIVE(1,0)); - resource->base = 0; - resource->size = 0; - resource->align = 0; - resource->gran = 0; - resource->limit = 0xffffffffUL; - resource->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED; -} - static void tolm_test(void *gp, struct device *dev, struct resource *new) { struct resource **best_p = gp; @@ -199,13 +175,10 @@ static void pci_domain_set_resources(device_t dev) assign_resources(&dev->link[0]); } -static u32 pci_domain_scan_bus(device_t dev, u32 max) +static u32 i3100_domain_scan_bus(device_t dev, u32 max) { - max = pci_scan_bus(&dev->link[0], 0, 0xff, max); - if (max > max_bus) { - max_bus = max; - } - return max; + max_bus = pci_domain_scan_bus(dev, max); + return max_bus; } static struct device_operations pci_domain_ops = { @@ -213,7 +186,7 @@ static struct device_operations pci_domain_ops = { .set_resources = pci_domain_set_resources, .enable_resources = enable_childrens_resources, .init = 0, - .scan_bus = pci_domain_scan_bus, + .scan_bus = i3100_domain_scan_bus, .ops_pci_bus = &pci_cf8_conf1, /* Do we want to use the memory mapped space here? */ }; diff --git a/src/northbridge/intel/i440bx/northbridge.c b/src/northbridge/intel/i440bx/northbridge.c index 34c868e0f3..05c614cb7a 100644 --- a/src/northbridge/intel/i440bx/northbridge.c +++ b/src/northbridge/intel/i440bx/northbridge.c @@ -33,24 +33,6 @@ static const struct pci_driver northbridge_driver __pci_driver = { .device = 0x7190, }; - -#define BRIDGE_IO_MASK (IORESOURCE_IO | IORESOURCE_MEM) - -static void pci_domain_read_resources(device_t dev) -{ - struct resource *resource; - - /* Initialize the system wide io space constraints */ - resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0,0)); - resource->limit = 0xffffUL; - resource->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED; - - /* Initialize the system wide memory resources constraints */ - resource = new_resource(dev, IOINDEX_SUBTRACTIVE(1,0)); - resource->limit = 0xffffffffULL; - resource->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED; -} - static void ram_resource(device_t dev, unsigned long index, unsigned long basek, unsigned long sizek) { @@ -95,7 +77,7 @@ static uint32_t find_pci_tolm(struct bus *bus) extern uint64_t high_tables_base, high_tables_size; #endif -static void pci_domain_set_resources(device_t dev) +static void i440bx_domain_set_resources(device_t dev) { device_t mc_dev; uint32_t pci_tolm; @@ -140,15 +122,9 @@ static void pci_domain_set_resources(device_t dev) assign_resources(&dev->link[0]); } -static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max) -{ - max = pci_scan_bus(&dev->link[0], PCI_DEVFN(0, 0), 0xff, max); - return max; -} - static struct device_operations pci_domain_ops = { .read_resources = pci_domain_read_resources, - .set_resources = pci_domain_set_resources, + .set_resources = i440bx_domain_set_resources, .enable_resources = enable_childrens_resources, .init = 0, .scan_bus = pci_domain_scan_bus, diff --git a/src/northbridge/intel/i82810/northbridge.c b/src/northbridge/intel/i82810/northbridge.c index 4b3c321963..c705b55a45 100644 --- a/src/northbridge/intel/i82810/northbridge.c +++ b/src/northbridge/intel/i82810/northbridge.c @@ -52,27 +52,6 @@ static const struct pci_driver northbridge_driver __pci_driver = { .device = 0x7120, }; -#define BRIDGE_IO_MASK (IORESOURCE_IO | IORESOURCE_MEM) - -static void pci_domain_read_resources(device_t dev) -{ - struct resource *resource; - unsigned reg; - - /* Initialize the system wide io space constraints */ - resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0)); - resource->base = 0x400; - resource->limit = 0xffffUL; - resource->flags = - IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED; - - /* Initialize the system wide memory resources constraints */ - resource = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0)); - resource->limit = 0xffffffffULL; - resource->flags = - IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED; -} - static void ram_resource(device_t dev, unsigned long index, unsigned long basek, unsigned long sizek) { @@ -181,12 +160,6 @@ static void pci_domain_set_resources(device_t dev) assign_resources(&dev->link[0]); } -static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max) -{ - max = pci_scan_bus(&dev->link[0], PCI_DEVFN(0, 0), 0xff, max); - return max; -} - static struct device_operations pci_domain_ops = { .read_resources = pci_domain_read_resources, .set_resources = pci_domain_set_resources, diff --git a/src/northbridge/intel/i82830/northbridge.c b/src/northbridge/intel/i82830/northbridge.c index 9f6ba71d41..2b913ea287 100644 --- a/src/northbridge/intel/i82830/northbridge.c +++ b/src/northbridge/intel/i82830/northbridge.c @@ -51,25 +51,6 @@ static struct pci_driver northbridge_driver __pci_driver = { .device = 0x3575, }; -#define BRIDGE_IO_MASK (IORESOURCE_IO | IORESOURCE_MEM) - -static void pci_domain_read_resources(device_t dev) -{ - struct resource *resource; - - /* Initialize the system wide I/O space constraints. */ - resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0)); - resource->limit = 0xffffUL; - resource->flags = - IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED; - - /* Initialize the system wide memory resources constraints. */ - resource = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0)); - resource->limit = 0xffffffffULL; - resource->flags = - IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED; -} - static void ram_resource(device_t dev, unsigned long index, unsigned long basek, unsigned long sizek) { @@ -158,12 +139,6 @@ static void pci_domain_set_resources(device_t dev) assign_resources(&dev->link[0]); } -static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max) -{ - max = pci_scan_bus(&dev->link[0], PCI_DEVFN(0, 0), 0xff, max); - return max; -} - static struct device_operations pci_domain_ops = { .read_resources = pci_domain_read_resources, .set_resources = pci_domain_set_resources, diff --git a/src/northbridge/intel/i855gme/northbridge.c b/src/northbridge/intel/i855gme/northbridge.c index ad48ee11de..5ad2122d37 100644 --- a/src/northbridge/intel/i855gme/northbridge.c +++ b/src/northbridge/intel/i855gme/northbridge.c @@ -31,24 +31,6 @@ #include #include "chip.h" -#define BRIDGE_IO_MASK (IORESOURCE_IO | IORESOURCE_MEM) - -static void pci_domain_read_resources(device_t dev) -{ - struct resource *resource; - unsigned reg; - - /* Initialize the system wide io space constraints */ - resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0)); - resource->limit = 0xffffUL; - resource->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED; - - /* Initialize the system wide memory resources constraints */ - resource = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0)); - resource->limit = 0xffffffffULL; - resource->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED; -} - static void ram_resource(device_t dev, unsigned long index, unsigned long basek, unsigned long sizek) { @@ -156,12 +138,6 @@ static void pci_domain_set_resources(device_t dev) assign_resources(&dev->link[0]); } -static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max) -{ - max = pci_scan_bus(&dev->link[0], PCI_DEVFN(0, 0), 0xff, max); - return max; -} - static struct device_operations pci_domain_ops = { .read_resources = pci_domain_read_resources, .set_resources = pci_domain_set_resources, diff --git a/src/northbridge/intel/i855pm/northbridge.c b/src/northbridge/intel/i855pm/northbridge.c index ce655a9f0d..f6a23914e2 100644 --- a/src/northbridge/intel/i855pm/northbridge.c +++ b/src/northbridge/intel/i855pm/northbridge.c @@ -10,23 +10,6 @@ #include #include "chip.h" -#define BRIDGE_IO_MASK (IORESOURCE_IO | IORESOURCE_MEM) - -static void pci_domain_read_resources(device_t dev) -{ - struct resource *resource; - - /* Initialize the system wide io space constraints */ - resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0)); - resource->limit = 0xffffUL; - resource->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED; - - /* Initialize the system wide memory resources constraints */ - resource = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0)); - resource->limit = 0xffffffffULL; - resource->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED; -} - static void ram_resource(device_t dev, unsigned long index, unsigned long basek, unsigned long sizek) { @@ -123,12 +106,6 @@ static void pci_domain_set_resources(device_t dev) assign_resources(&dev->link[0]); } -static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max) -{ - max = pci_scan_bus(&dev->link[0], PCI_DEVFN(0, 0), 0xff, max); - return max; -} - static struct device_operations pci_domain_ops = { .read_resources = pci_domain_read_resources, .set_resources = pci_domain_set_resources, diff --git a/src/northbridge/intel/i945/northbridge.c b/src/northbridge/intel/i945/northbridge.c index b0ddbda7e4..c07a00c149 100644 --- a/src/northbridge/intel/i945/northbridge.c +++ b/src/northbridge/intel/i945/northbridge.c @@ -43,31 +43,6 @@ static void ram_resource(device_t dev, unsigned long index, unsigned long basek, IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED; } -static void pci_domain_read_resources(device_t dev) -{ - struct resource *resource; - - /* Initialize the system wide io space constraints */ - resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0)); - resource->base = 0; - resource->size = 0; - resource->align = 0; - resource->gran = 0; - resource->limit = 0xffffUL; - resource->flags = - IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED; - - /* Initialize the system wide memory resources constraints */ - resource = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0)); - resource->base = 0; - resource->size = 0; - resource->align = 0; - resource->gran = 0; - resource->limit = 0xffffffffUL; - resource->flags = - IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED; -} - static void tolm_test(void *gp, struct device *dev, struct resource *new) { struct resource **best_p = gp; @@ -184,15 +159,10 @@ static void pci_domain_set_resources(device_t dev) #endif } -static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max) -{ - max = pci_scan_bus(&dev->link[0], 0, 0xff, max); /* TODO We could determine how many PCIe busses we need in * the bar. For now that number is hardcoded to a max of 64. + * See e7525/northbridge.c for an example. */ - return max; -} - static struct device_operations pci_domain_ops = { .read_resources = pci_domain_read_resources, .set_resources = pci_domain_set_resources, diff --git a/src/northbridge/motorola/mpc107/mpc107_northbridge.c b/src/northbridge/motorola/mpc107/mpc107_northbridge.c index 7e692f039d..9c13191147 100644 --- a/src/northbridge/motorola/mpc107/mpc107_northbridge.c +++ b/src/northbridge/motorola/mpc107/mpc107_northbridge.c @@ -16,7 +16,7 @@ * be large enough to hold all expected resources for all PCI * devices. */ -static void pci_domain_read_resources(device_t dev) +static void mpc107_domain_read_resources(device_t dev) { struct resource *resource; @@ -101,15 +101,8 @@ static void pci_domain_set_resources(device_t dev) assign_resources(&dev->link[0]); } - -static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max) -{ - max = pci_scan_bus(&dev->link[0], PCI_DEVFN(0, 0), 0xff, max); - return max; -} - static struct device_operations pci_domain_ops = { - .read_resources = pci_domain_read_resources, + .read_resources = mpc107_domain_read_resources, .set_resources = pci_domain_set_resources, .enable_resources = enable_childrens_resources, .init = 0, diff --git a/src/northbridge/via/cn400/northbridge.c b/src/northbridge/via/cn400/northbridge.c index a02abc93af..c4998a8599 100644 --- a/src/northbridge/via/cn400/northbridge.c +++ b/src/northbridge/via/cn400/northbridge.c @@ -101,11 +101,11 @@ static const struct pci_driver memctrl_driver __pci_driver = { .device = PCI_DEVICE_ID_VIA_CN400_MEMCTRL, }; -static void pci_domain_read_resources(device_t dev) +static void cn400_domain_read_resources(device_t dev) { struct resource *resource; - printk_spew("Entering cn400 pci_domain_read_resources.\n"); + printk_spew("Entering %s.\n", __func__); /* Initialize the system wide I/O space constraints. */ resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0)); @@ -119,7 +119,7 @@ static void pci_domain_read_resources(device_t dev) resource->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED; - printk_spew("Leaving cn400 pci_domain_read_resources.\n"); + printk_spew("Leaving %s.\n", __func__); } static void ram_resource(device_t dev, unsigned long index, @@ -173,14 +173,14 @@ static u32 find_pci_tolm(struct bus *bus) extern uint64_t high_tables_base, high_tables_size; #endif -static void pci_domain_set_resources(device_t dev) +static void cn400_domain_set_resources(device_t dev) { /* The order is important to find the correct RAM size. */ static const u8 ramregs[] = { 0x43, 0x42, 0x41, 0x40 }; device_t mc_dev; u32 pci_tolm; - printk_spew("Entering cn400 pci_domain_set_resources.\n"); + printk_spew("Entering %s.\n", __func__); pci_tolm = find_pci_tolm(&dev->link[0]); mc_dev = dev_find_device(PCI_VENDOR_ID_VIA, @@ -226,23 +226,23 @@ static void pci_domain_set_resources(device_t dev) } assign_resources(&dev->link[0]); - printk_spew("Leaving cn400 pci_domain_set_resources.\n"); + printk_spew("Leaving %s.\n", __func__); } -static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max) +static unsigned int cn400_domain_scan_bus(device_t dev, unsigned int max) { - printk_debug("Entering cn400 pci_domain_scan_bus.\n"); + printk_debug("Entering %s.\n", __func__); max = pci_scan_bus(&dev->link[0], PCI_DEVFN(0, 0), 0xff, max); return max; } static const struct device_operations pci_domain_ops = { - .read_resources = pci_domain_read_resources, - .set_resources = pci_domain_set_resources, + .read_resources = cn400_domain_read_resources, + .set_resources = cn400_domain_set_resources, .enable_resources = enable_childrens_resources, .init = 0, - .scan_bus = pci_domain_scan_bus, + .scan_bus = cn400_domain_scan_bus, }; static void cpu_bus_init(device_t dev) diff --git a/src/northbridge/via/cn700/northbridge.c b/src/northbridge/via/cn700/northbridge.c index dc421d3e51..2b9a9e1832 100644 --- a/src/northbridge/via/cn700/northbridge.c +++ b/src/northbridge/via/cn700/northbridge.c @@ -97,27 +97,6 @@ static const struct pci_driver memctrl_driver __pci_driver = { .device = PCI_DEVICE_ID_VIA_CN700_MEMCTRL, }; -static void pci_domain_read_resources(device_t dev) -{ - struct resource *resource; - - printk_spew("Entering cn700 pci_domain_read_resources.\n"); - - /* Initialize the system wide I/O space constraints. */ - resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0)); - resource->limit = 0xffffUL; - resource->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | - IORESOURCE_ASSIGNED; - - /* Initialize the system wide memory resources constraints. */ - resource = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0)); - resource->limit = 0xffffffffULL; - resource->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | - IORESOURCE_ASSIGNED; - - printk_spew("Leaving cn700 pci_domain_read_resources.\n"); -} - static void ram_resource(device_t dev, unsigned long index, unsigned long basek, unsigned long sizek) { @@ -223,14 +202,6 @@ static void pci_domain_set_resources(device_t dev) assign_resources(&dev->link[0]); } -static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max) -{ - printk_debug("Entering cn700 pci_domain_scan_bus.\n"); - - max = pci_scan_bus(&dev->link[0], PCI_DEVFN(0, 0), 0xff, max); - return max; -} - static const struct device_operations pci_domain_ops = { .read_resources = pci_domain_read_resources, .set_resources = pci_domain_set_resources, diff --git a/src/northbridge/via/cx700/cx700_lpc.c b/src/northbridge/via/cx700/cx700_lpc.c index 65275baa81..217b174d65 100644 --- a/src/northbridge/via/cx700/cx700_lpc.c +++ b/src/northbridge/via/cx700/cx700_lpc.c @@ -329,7 +329,7 @@ static void cx700_set_lpc_registers(struct device *dev) void cx700_read_resources(device_t dev) { - struct resource *resource; + struct resource *res; /* Make sure we call our childrens set/enable functions - these * are not called unless this device has a resource to set. @@ -337,11 +337,16 @@ void cx700_read_resources(device_t dev) pci_dev_read_resources(dev); - resource = new_resource(dev, 1); - resource->flags |= - IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IO | IORESOURCE_STORED; - resource->size = 2; - resource->base = 0x2e; + res = new_resource(dev, 1); + res->base = 0x0UL; + res->size = 0x400UL; + res->limit = 0xffffUL; + res->flags = IORESOURCE_IO | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; + + res = new_resource(dev, 3); /* IOAPIC */ + res->base = 0xfec00000; + res->size = 0x00001000; + res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; } void cx700_set_resources(device_t dev) diff --git a/src/northbridge/via/cx700/northbridge.c b/src/northbridge/via/cx700/northbridge.c index 7c09b9495b..82ea062023 100644 --- a/src/northbridge/via/cx700/northbridge.c +++ b/src/northbridge/via/cx700/northbridge.c @@ -32,21 +32,6 @@ #include "chip.h" #include "northbridge.h" -static void pci_domain_read_resources(device_t dev) -{ - struct resource *resource; - - /* Initialize the system wide io space constraints */ - resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0)); - resource->limit = 0xffffUL; - resource->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED; - - /* Initialize the system wide memory resources constraints */ - resource = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0)); - resource->limit = 0xffffffffULL; - resource->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED; -} - static void ram_resource(device_t dev, unsigned long index, unsigned long basek, unsigned long sizek) { @@ -146,12 +131,6 @@ static void pci_domain_set_resources(device_t dev) assign_resources(&dev->link[0]); } -static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max) -{ - max = pci_scan_bus(&dev->link[0], PCI_DEVFN(0, 0), 0xff, max); - return max; -} - static struct device_operations pci_domain_ops = { .read_resources = pci_domain_read_resources, .set_resources = pci_domain_set_resources, diff --git a/src/northbridge/via/vt8601/northbridge.c b/src/northbridge/via/vt8601/northbridge.c index b58b8edf88..8fb82f0023 100644 --- a/src/northbridge/via/vt8601/northbridge.c +++ b/src/northbridge/via/vt8601/northbridge.c @@ -45,23 +45,6 @@ static const struct pci_driver northbridge_driver __pci_driver = { .device = 0x0601, /* 0x8601 is the AGP bridge? */ }; -#define BRIDGE_IO_MASK (IORESOURCE_IO | IORESOURCE_MEM) - -static void pci_domain_read_resources(device_t dev) -{ - struct resource *resource; - - /* Initialize the system wide io space constraints */ - resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0,0)); - resource->limit = 0xffffUL; - resource->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED; - - /* Initialize the system wide memory resources constraints */ - resource = new_resource(dev, IOINDEX_SUBTRACTIVE(1,0)); - resource->limit = 0xffffffffULL; - resource->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED; -} - static void ram_resource(device_t dev, unsigned long index, unsigned long basek, unsigned long sizek) { @@ -160,12 +143,6 @@ static void pci_domain_set_resources(device_t dev) assign_resources(&dev->link[0]); } -static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max) -{ - max = pci_scan_bus(&dev->link[0], PCI_DEVFN(0, 0), 0xff, max); - return max; -} - static struct device_operations pci_domain_ops = { .read_resources = pci_domain_read_resources, .set_resources = pci_domain_set_resources, diff --git a/src/northbridge/via/vt8623/northbridge.c b/src/northbridge/via/vt8623/northbridge.c index 41c472b568..e0ad3a8053 100644 --- a/src/northbridge/via/vt8623/northbridge.c +++ b/src/northbridge/via/vt8623/northbridge.c @@ -190,30 +190,6 @@ static const struct pci_driver vga_driver __pci_driver = { .device = 0x3122, }; - -#define BRIDGE_IO_MASK (IORESOURCE_IO | IORESOURCE_MEM) - -static void pci_domain_read_resources(device_t dev) -{ - struct resource *resource; - - printk_spew("Entering vt8623 pci_domain_read_resources.\n"); - - /* Initialize the system wide io space constraints */ - resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0,0)); - resource->limit = 0xffffUL; - resource->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | - IORESOURCE_ASSIGNED; - - /* Initialize the system wide memory resources constraints */ - resource = new_resource(dev, IOINDEX_SUBTRACTIVE(1,0)); - resource->limit = 0xffffffffULL; - resource->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | - IORESOURCE_ASSIGNED; - - printk_spew("Leaving vt8623 pci_domain_read_resources.\n"); -} - static void ram_resource(device_t dev, unsigned long index, unsigned long basek, unsigned long sizek) { @@ -313,14 +289,6 @@ static void pci_domain_set_resources(device_t dev) assign_resources(&dev->link[0]); } -static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max) -{ - printk_spew("Entering vt8623 pci_domain_scan_bus.\n"); - - max = pci_scan_bus(&dev->link[0], PCI_DEVFN(0, 0), 0xff, max); - return max; -} - static struct device_operations pci_domain_ops = { .read_resources = pci_domain_read_resources, .set_resources = pci_domain_set_resources, diff --git a/src/northbridge/via/vx800/northbridge.c b/src/northbridge/via/vx800/northbridge.c index 6552085135..7042f67f12 100644 --- a/src/northbridge/via/vx800/northbridge.c +++ b/src/northbridge/via/vx800/northbridge.c @@ -69,27 +69,6 @@ static const struct pci_driver memctrl_driver __pci_driver = { .device = PCI_DEVICE_ID_VIA_VX855_MEMCTRL, }; -static void pci_domain_read_resources(device_t dev) -{ - struct resource *resource; - - printk_spew("Entering vx800 pci_domain_read_resources.\n"); - - /* Initialize the system wide io space constraints */ - resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0)); - resource->limit = 0xffffUL; - resource->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | - IORESOURCE_ASSIGNED; - - /* Initialize the system wide memory resources constraints */ - resource = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0)); - resource->limit = 0xffffffffULL; - resource->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | - IORESOURCE_ASSIGNED; - - printk_spew("Leaving vx800 pci_domain_read_resources.\n"); -} - static void ram_resource(device_t dev, unsigned long index, unsigned long basek, unsigned long sizek) { @@ -195,14 +174,6 @@ if register with invalid value we set frame buffer size to 32M for default, but assign_resources(&dev->link[0]); } -static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max) -{ - printk_debug("Entering vx800 pci_domain_scan_bus.\n"); - - max = pci_scan_bus(&dev->link[0], PCI_DEVFN(0, 0), 0xff, max); - return max; -} - static const struct device_operations pci_domain_ops = { .read_resources = pci_domain_read_resources, .set_resources = pci_domain_set_resources, -- cgit v1.2.3