From 2510e2aa448dd7eb52232fa65def0be16af5da84 Mon Sep 17 00:00:00 2001
From: Stefan Reinauer <stefan.reinauer@coreboot.org>
Date: Wed, 24 Feb 2016 14:01:59 -0800
Subject: northbridge/intel/i3100: Unify UDELAY selection

Instead of manually including udelay_io.c in each romstage,
select UDELAY_IO for all i3100 boards in the chipset.

Change-Id: Ia66a0561c75777a9e98bb87117859808a2ff3732
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: https://review.coreboot.org/13786
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
---
 src/northbridge/intel/i3100/Kconfig           | 1 +
 src/northbridge/intel/i3100/raminit_ep80579.c | 1 +
 2 files changed, 2 insertions(+)

(limited to 'src/northbridge')

diff --git a/src/northbridge/intel/i3100/Kconfig b/src/northbridge/intel/i3100/Kconfig
index cb0bd38086..2260664129 100644
--- a/src/northbridge/intel/i3100/Kconfig
+++ b/src/northbridge/intel/i3100/Kconfig
@@ -1,6 +1,7 @@
 config NORTHBRIDGE_INTEL_I3100
 	bool
 	select LATE_CBMEM_INIT
+	select UDELAY_IO
 
 if NORTHBRIDGE_INTEL_I3100
 config DIMM_MAP_LOGICAL
diff --git a/src/northbridge/intel/i3100/raminit_ep80579.c b/src/northbridge/intel/i3100/raminit_ep80579.c
index 7996e111bc..497339c0e7 100644
--- a/src/northbridge/intel/i3100/raminit_ep80579.c
+++ b/src/northbridge/intel/i3100/raminit_ep80579.c
@@ -19,6 +19,7 @@
 #include <cpu/x86/cache.h>
 #include <cpu/intel/speedstep.h>
 #include <lib.h>
+#include <delay.h>
 #include "raminit_ep80579.h"
 #include "ep80579.h"
 
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