From 14f544092f552b06d678b73df6cf343e8bedc829 Mon Sep 17 00:00:00 2001 From: Nico Huber Date: Sun, 9 Jun 2024 20:22:09 +0200 Subject: nb/via/cx700: Scan PCI bus and probe resources Change-Id: I1268a8f886ff395ff822b14a5427a5031260c541 Signed-off-by: Nico Huber Reviewed-on: https://review.coreboot.org/c/coreboot/+/83389 Reviewed-by: Angel Pons Tested-by: build bot (Jenkins) --- src/northbridge/via/cx700/Makefile.mk | 2 +- src/northbridge/via/cx700/chipset.cb | 1 + src/northbridge/via/cx700/northbridge.c | 9 +++++++++ 3 files changed, 11 insertions(+), 1 deletion(-) create mode 100644 src/northbridge/via/cx700/northbridge.c (limited to 'src/northbridge') diff --git a/src/northbridge/via/cx700/Makefile.mk b/src/northbridge/via/cx700/Makefile.mk index 3b9608c867..80fc6b9caf 100644 --- a/src/northbridge/via/cx700/Makefile.mk +++ b/src/northbridge/via/cx700/Makefile.mk @@ -7,7 +7,7 @@ CFLAGS_romstage += --param=min-pagesize=0 bootblock-y += early_smbus.c bootblock.c romstage-y += early_smbus.c memmap.c romstage.c raminit.c -ramstage-y += memmap.c chip.c +ramstage-y += memmap.c chip.c northbridge.c all-y += clock.c reset.c endif diff --git a/src/northbridge/via/cx700/chipset.cb b/src/northbridge/via/cx700/chipset.cb index 25c2f113bd..74fbcd70ce 100644 --- a/src/northbridge/via/cx700/chipset.cb +++ b/src/northbridge/via/cx700/chipset.cb @@ -1,6 +1,7 @@ chip northbridge/via/cx700 device domain 0 on + ops domain_ops device pci 00.0 alias host_ctrl on end device pci 00.1 alias host_err on end diff --git a/src/northbridge/via/cx700/northbridge.c b/src/northbridge/via/cx700/northbridge.c new file mode 100644 index 0000000000..d68e765018 --- /dev/null +++ b/src/northbridge/via/cx700/northbridge.c @@ -0,0 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include + +struct device_operations domain_ops = { + .read_resources = pci_domain_read_resources, + .set_resources = pci_domain_set_resources, + .scan_bus = pci_host_bridge_scan_bus, +}; -- cgit v1.2.3