From 06667a52474bae9f9c88ed5efa9df44cb20c9dd3 Mon Sep 17 00:00:00 2001 From: Vladimir Serbinenko Date: Tue, 12 Aug 2014 09:07:13 +0200 Subject: gm45: Move S3 detection to enable stage. Also move it to NB to be in line with other. Change-Id: Ibd961d60dcd686899f34f6a494c14ff9d65e618b Signed-off-by: Vladimir Serbinenko Reviewed-on: http://review.coreboot.org/6625 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi --- src/northbridge/intel/gm45/northbridge.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) (limited to 'src/northbridge') diff --git a/src/northbridge/intel/gm45/northbridge.c b/src/northbridge/intel/gm45/northbridge.c index afac03589d..48a81c0e95 100644 --- a/src/northbridge/intel/gm45/northbridge.c +++ b/src/northbridge/intel/gm45/northbridge.c @@ -32,6 +32,7 @@ #include #include "chip.h" #include "gm45.h" +#include "arch/acpi.h" /* Reserve everything between A segment and 1MB: * @@ -228,6 +229,23 @@ static void enable_dev(device_t dev) } else if (dev->path.type == DEVICE_PATH_CPU_CLUSTER) { dev->ops = &cpu_bus_ops; } + +#if CONFIG_HAVE_ACPI_RESUME + switch (pci_read_config32(dev_find_slot(0, PCI_DEVFN(0, 0)), /*D0F0_SKPD*/0xdc)) { + case SKPAD_NORMAL_BOOT_MAGIC: + printk(BIOS_DEBUG, "Normal boot.\n"); + acpi_slp_type=0; + break; + case SKPAD_ACPI_S3_MAGIC: + printk(BIOS_DEBUG, "S3 Resume.\n"); + acpi_slp_type=3; + break; + default: + printk(BIOS_DEBUG, "Unknown boot method, assuming normal.\n"); + acpi_slp_type=0; + break; + } +#endif } static void gm45_init(void *const chip_info) -- cgit v1.2.3