From dd4390b6e055ef862084a5fc45b756d6fe09151d Mon Sep 17 00:00:00 2001 From: Patrick Georgi Date: Sat, 31 Oct 2015 16:12:51 +0100 Subject: via/cx700: Fix hidden compile error and make sure it won't hide again A wrong function name made an #ifdef'd code path not compile. Fix that, and also use IS_ENABLED() to make sure that such issues won't come up again there. Change-Id: Iccb98842dde498cce32cd86a770e22a506ad4cc2 Signed-off-by: Patrick Georgi Reviewed-on: http://review.coreboot.org/12296 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel Reviewed-by: Stefan Reinauer --- src/northbridge/via/cx700/raminit.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) (limited to 'src/northbridge/via') diff --git a/src/northbridge/via/cx700/raminit.c b/src/northbridge/via/cx700/raminit.c index 8a19c5025f..249f265376 100644 --- a/src/northbridge/via/cx700/raminit.c +++ b/src/northbridge/via/cx700/raminit.c @@ -1250,14 +1250,14 @@ static void sdram_enable(const struct mem_controller *ctrl) } } -#ifdef MEM_WIDTH_32BIT_MODE - /****************************************************************/ - /* Set Dram 32bit Mode */ - /****************************************************************/ - reg8 = pci_read_config8(MEMCTRL, 0x6c); - reg8 |= 0x20; - pci_write_config(MEMCTRL, 0x6c, reg8); -#endif + if (IS_ENABLED(MEM_WIDTH_32BIT_MODE)) { + /********************************************************/ + /* Set Dram 32bit Mode */ + /********************************************************/ + reg8 = pci_read_config8(MEMCTRL, 0x6c); + reg8 |= 0x20; + pci_write_config8(MEMCTRL, 0x6c, reg8); + } /****************************************************************/ /* Find the DQSI Low/High bound and save it to Scratch register */ -- cgit v1.2.3