From 0867062412dd4bfe5a556e5f3fd85ba5b682d79b Mon Sep 17 00:00:00 2001 From: Stefan Reinauer Date: Tue, 30 Jun 2009 15:17:49 +0000 Subject: This patch unifies the use of config options in v2 to all start with CONFIG_ It's basically done with the following script and some manual fixup: VARS=`grep ^define src/config/Options.lb | cut -f2 -d\ | grep -v ^CONFIG | grep -v ^COREBOOT |grep -v ^CC` for VAR in $VARS; do find . -name .svn -prune -o -type f -exec perl -pi -e "s/(^|[^0-9a-zA-Z_]+)$VAR($|[^0-9a-zA-Z_]+)/\1CONFIG_$VAR\2/g" {} \; done Signed-off-by: Stefan Reinauer Acked-by: Ronald G. Minnich git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4381 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/northbridge/via/cn700/Config.lb | 4 ++-- src/northbridge/via/cn700/northbridge.c | 4 ++-- src/northbridge/via/cn700/vga.c | 4 ++-- src/northbridge/via/cx700/Config.lb | 4 ++-- src/northbridge/via/cx700/northbridge.c | 4 ++-- src/northbridge/via/vt8601/Config.lb | 4 ++-- src/northbridge/via/vt8601/northbridge.c | 4 ++-- src/northbridge/via/vt8623/Config.lb | 4 ++-- src/northbridge/via/vt8623/northbridge.c | 4 ++-- src/northbridge/via/vx800/examples/cache_as_ram_auto.c | 8 ++++---- src/northbridge/via/vx800/examples/chipset_init.c | 4 ++-- src/northbridge/via/vx800/romstrap.lds | 2 +- 12 files changed, 25 insertions(+), 25 deletions(-) (limited to 'src/northbridge/via') diff --git a/src/northbridge/via/cn700/Config.lb b/src/northbridge/via/cn700/Config.lb index b824a17b75..e79e0e02e1 100644 --- a/src/northbridge/via/cn700/Config.lb +++ b/src/northbridge/via/cn700/Config.lb @@ -18,7 +18,7 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ## -uses HAVE_HIGH_TABLES +uses CONFIG_HAVE_HIGH_TABLES config chip.h @@ -28,4 +28,4 @@ driver northbridge.o driver agp.o driver vga.o -default HAVE_HIGH_TABLES=1 +default CONFIG_HAVE_HIGH_TABLES=1 diff --git a/src/northbridge/via/cn700/northbridge.c b/src/northbridge/via/cn700/northbridge.c index 2d3adf1288..dc421d3e51 100644 --- a/src/northbridge/via/cn700/northbridge.c +++ b/src/northbridge/via/cn700/northbridge.c @@ -163,7 +163,7 @@ static u32 find_pci_tolm(struct bus *bus) return tolm; } -#if HAVE_HIGH_TABLES==1 +#if CONFIG_HAVE_HIGH_TABLES==1 /* maximum size of high tables in KB */ #define HIGH_TABLES_SIZE 64 extern uint64_t high_tables_base, high_tables_size; @@ -206,7 +206,7 @@ static void pci_domain_set_resources(device_t dev) tolmk = tomk; } -#if HAVE_HIGH_TABLES == 1 +#if CONFIG_HAVE_HIGH_TABLES == 1 high_tables_base = (tolmk - HIGH_TABLES_SIZE) * 1024; high_tables_size = HIGH_TABLES_SIZE* 1024; printk_debug("tom: %lx, high_tables_base: %llx, high_tables_size: %llx\n", tomk*1024, high_tables_base, high_tables_size); diff --git a/src/northbridge/via/cn700/vga.c b/src/northbridge/via/cn700/vga.c index 6cc885fd4b..3c8fb61ce6 100644 --- a/src/northbridge/via/cn700/vga.c +++ b/src/northbridge/via/cn700/vga.c @@ -49,10 +49,10 @@ static void vga_init(device_t dev) print_debug("Copying BOCHS BIOS to 0xf000\n"); /* - * Copy BOCHS BIOS from 4G-ROM_SIZE-64k (in flash) to 0xf0000 (in RAM) + * Copy BOCHS BIOS from 4G-CONFIG_ROM_SIZE-64k (in flash) to 0xf0000 (in RAM) * This is for compatibility with the VGA ROM's BIOS callbacks. */ - memcpy(0xf0000, (0xffffffff - ROM_SIZE - 0xffff), 0x10000); + memcpy(0xf0000, (0xffffffff - CONFIG_ROM_SIZE - 0xffff), 0x10000); printk_debug("Initializing VGA\n"); diff --git a/src/northbridge/via/cx700/Config.lb b/src/northbridge/via/cx700/Config.lb index 44299ba729..8f87759bce 100644 --- a/src/northbridge/via/cx700/Config.lb +++ b/src/northbridge/via/cx700/Config.lb @@ -15,7 +15,7 @@ ## along with this program; if not, write to the Free Software ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA -uses HAVE_HIGH_TABLES +uses CONFIG_HAVE_HIGH_TABLES config chip.h @@ -28,4 +28,4 @@ driver cx700_lpc.o driver cx700_sata.o driver cx700_vga.o -default HAVE_HIGH_TABLES=1 +default CONFIG_HAVE_HIGH_TABLES=1 diff --git a/src/northbridge/via/cx700/northbridge.c b/src/northbridge/via/cx700/northbridge.c index c7bbb8bf85..7c09b9495b 100644 --- a/src/northbridge/via/cx700/northbridge.c +++ b/src/northbridge/via/cx700/northbridge.c @@ -87,7 +87,7 @@ static u32 find_pci_tolm(struct bus *bus) return tolm; } -#if HAVE_HIGH_TABLES==1 +#if CONFIG_HAVE_HIGH_TABLES==1 /* maximum size of high tables in KB */ #define HIGH_TABLES_SIZE 64 extern uint64_t high_tables_base, high_tables_size; @@ -131,7 +131,7 @@ static void pci_domain_set_resources(device_t dev) tolmk -= 1024; // TOP 1M SM Memory } -#if HAVE_HIGH_TABLES == 1 +#if CONFIG_HAVE_HIGH_TABLES == 1 high_tables_base = (tolmk - HIGH_TABLES_SIZE) * 1024; high_tables_size = HIGH_TABLES_SIZE* 1024; printk_debug("tom: %lx, high_tables_base: %llx, high_tables_size: %llx\n", tomk*1024, high_tables_base, high_tables_size); diff --git a/src/northbridge/via/vt8601/Config.lb b/src/northbridge/via/vt8601/Config.lb index 9cf0154983..1523f98cfd 100644 --- a/src/northbridge/via/vt8601/Config.lb +++ b/src/northbridge/via/vt8601/Config.lb @@ -1,7 +1,7 @@ -uses HAVE_HIGH_TABLES +uses CONFIG_HAVE_HIGH_TABLES config chip.h driver northbridge.o -default HAVE_HIGH_TABLES=1 +default CONFIG_HAVE_HIGH_TABLES=1 diff --git a/src/northbridge/via/vt8601/northbridge.c b/src/northbridge/via/vt8601/northbridge.c index b1e1c494cb..b58b8edf88 100644 --- a/src/northbridge/via/vt8601/northbridge.c +++ b/src/northbridge/via/vt8601/northbridge.c @@ -101,7 +101,7 @@ static uint32_t find_pci_tolm(struct bus *bus) return tolm; } -#if HAVE_HIGH_TABLES==1 +#if CONFIG_HAVE_HIGH_TABLES==1 /* maximum size of high tables in KB */ #define HIGH_TABLES_SIZE 64 extern uint64_t high_tables_base, high_tables_size; @@ -147,7 +147,7 @@ static void pci_domain_set_resources(device_t dev) tolmk = tomk; } -#if HAVE_HIGH_TABLES == 1 +#if CONFIG_HAVE_HIGH_TABLES == 1 high_tables_base = (tolmk - HIGH_TABLES_SIZE) * 1024; high_tables_size = HIGH_TABLES_SIZE* 1024; printk_debug("tom: %lx, high_tables_base: %llx, high_tables_size: %llx\n", tomk*1024, high_tables_base, high_tables_size); diff --git a/src/northbridge/via/vt8623/Config.lb b/src/northbridge/via/vt8623/Config.lb index 9cf0154983..1523f98cfd 100644 --- a/src/northbridge/via/vt8623/Config.lb +++ b/src/northbridge/via/vt8623/Config.lb @@ -1,7 +1,7 @@ -uses HAVE_HIGH_TABLES +uses CONFIG_HAVE_HIGH_TABLES config chip.h driver northbridge.o -default HAVE_HIGH_TABLES=1 +default CONFIG_HAVE_HIGH_TABLES=1 diff --git a/src/northbridge/via/vt8623/northbridge.c b/src/northbridge/via/vt8623/northbridge.c index 70ba59c1d2..41c472b568 100644 --- a/src/northbridge/via/vt8623/northbridge.c +++ b/src/northbridge/via/vt8623/northbridge.c @@ -253,7 +253,7 @@ static uint32_t find_pci_tolm(struct bus *bus) return tolm; } -#if HAVE_HIGH_TABLES==1 +#if CONFIG_HAVE_HIGH_TABLES==1 /* maximum size of high tables in KB */ #define HIGH_TABLES_SIZE 64 extern uint64_t high_tables_base, high_tables_size; @@ -299,7 +299,7 @@ static void pci_domain_set_resources(device_t dev) tolmk = tomk; } -#if HAVE_HIGH_TABLES == 1 +#if CONFIG_HAVE_HIGH_TABLES == 1 high_tables_base = (tolmk - HIGH_TABLES_SIZE) * 1024; high_tables_size = HIGH_TABLES_SIZE* 1024; printk_debug("tom: %lx, high_tables_base: %llx, high_tables_size: %llx\n", tomk*1024, high_tables_base, high_tables_size); diff --git a/src/northbridge/via/vx800/examples/cache_as_ram_auto.c b/src/northbridge/via/vx800/examples/cache_as_ram_auto.c index 8f53975f89..1580d48acb 100644 --- a/src/northbridge/via/vx800/examples/cache_as_ram_auto.c +++ b/src/northbridge/via/vx800/examples/cache_as_ram_auto.c @@ -563,7 +563,7 @@ the following code is copied from src\mainboard\tyan\s2735\cache_as_ram_auto.c Only the code around CLEAR_FIRST_1M_RAM is changed. I remove all the code around CLEAR_FIRST_1M_RAM and #include "cpu/x86/car/cache_as_ram_post.c" the CLEAR_FIRST_1M_RAM seems to make cpu/x86/car/cache_as_ram_post.c stop at somewhere, -and cpu/x86/car/cache_as_ram_post.c do not cache my $XIP_ROM_BASE+SIZE area. +and cpu/x86/car/cache_as_ram_post.c do not cache my $CONFIG_XIP_ROM_BASE+SIZE area. So,I use: #include "cpu/via/car/cache_as_ram_post.c". my via-version post.c have some diff withx86-version */ @@ -621,11 +621,11 @@ So,I use: #include "cpu/via/car/cache_as_ram_post.c". my via-version post.c have #include "cpu/via/car/cache_as_ram_post.c" //#include "cpu/x86/car/cache_as_ram_post.c" __asm__ volatile ( - /* set new esp *//* before _RAMBASE */ + /* set new esp *//* before CONFIG_RAMBASE */ "subl %0, %%ebp\n\t" "subl %0, %%esp\n\t":: - "a" ((DCACHE_RAM_BASE + DCACHE_RAM_SIZE) - - _RAMBASE) + "a" ((CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE) - + CONFIG_RAMBASE) ); { diff --git a/src/northbridge/via/vx800/examples/chipset_init.c b/src/northbridge/via/vx800/examples/chipset_init.c index d4e7e40dec..644284eef7 100644 --- a/src/northbridge/via/vx800/examples/chipset_init.c +++ b/src/northbridge/via/vx800/examples/chipset_init.c @@ -18,7 +18,7 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -#if HAVE_ACPI_RESUME == 1 +#if CONFIG_HAVE_ACPI_RESUME == 1 #include #endif #include <../northbridge/via/vx800/vx800.h> @@ -620,7 +620,7 @@ void init_VIA_chipset(void) void hardwaremain(int boot_complete) { struct lb_memory *lb_mem; -#if HAVE_ACPI_RESUME == 1 +#if CONFIG_HAVE_ACPI_RESUME == 1 void *wake_vec; #endif diff --git a/src/northbridge/via/vx800/romstrap.lds b/src/northbridge/via/vx800/romstrap.lds index 2e300c95a5..66159e3a1c 100644 --- a/src/northbridge/via/vx800/romstrap.lds +++ b/src/northbridge/via/vx800/romstrap.lds @@ -19,7 +19,7 @@ */ SECTIONS { - . = (_ROMBASE + ROM_IMAGE_SIZE - 0x2c) - (__romstrap_end - __romstrap_start); + . = (CONFIG_ROMBASE + CONFIG_ROM_IMAGE_SIZE - 0x2c) - (__romstrap_end - __romstrap_start); .romstrap (.): { *(.romstrap) } -- cgit v1.2.3