From f1b58b78351d7ed220673e688a2f7bc9e96da4e2 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= <kyosti.malkki@gmail.com>
Date: Fri, 1 Mar 2019 13:43:02 +0200
Subject: device/pci: Fix PCI accessor headers
MIME-Version: 1.0
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PCI config accessors are no longer indirectly included
from <arch/io.h> use <device/pci_ops.h> instead.

Change-Id: I2adf46430a33bc52ef69d1bf7dca4655fc8475bd
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/31675
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
---
 src/northbridge/via/vx900/bootblock.c    | 1 +
 src/northbridge/via/vx900/chrome9hd.c    | 1 +
 src/northbridge/via/vx900/early_smbus.c  | 1 +
 src/northbridge/via/vx900/early_vx900.c  | 1 +
 src/northbridge/via/vx900/lpc.c          | 1 +
 src/northbridge/via/vx900/memmap.c       | 1 +
 src/northbridge/via/vx900/northbridge.c  | 1 +
 src/northbridge/via/vx900/pcie.c         | 1 +
 src/northbridge/via/vx900/raminit_ddr3.c | 1 +
 src/northbridge/via/vx900/sata.c         | 1 +
 src/northbridge/via/vx900/traf_ctrl.c    | 1 +
 src/northbridge/via/vx900/vx900.h        | 2 +-
 12 files changed, 12 insertions(+), 1 deletion(-)

(limited to 'src/northbridge/via/vx900')

diff --git a/src/northbridge/via/vx900/bootblock.c b/src/northbridge/via/vx900/bootblock.c
index 11123b6e11..1051be45ca 100644
--- a/src/northbridge/via/vx900/bootblock.c
+++ b/src/northbridge/via/vx900/bootblock.c
@@ -15,6 +15,7 @@
  */
 
 #include <arch/io.h>
+#include <device/pci_ops.h>
 
 #if CONFIG_ROM_SIZE == 0x80000
 #  define ROM_DECODE_MAP 0x00
diff --git a/src/northbridge/via/vx900/chrome9hd.c b/src/northbridge/via/vx900/chrome9hd.c
index abba4d3b34..69a0a6b6c9 100644
--- a/src/northbridge/via/vx900/chrome9hd.c
+++ b/src/northbridge/via/vx900/chrome9hd.c
@@ -15,6 +15,7 @@
  */
 
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <console/console.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
diff --git a/src/northbridge/via/vx900/early_smbus.c b/src/northbridge/via/vx900/early_smbus.c
index 0cf7427e5d..5816926f59 100644
--- a/src/northbridge/via/vx900/early_smbus.c
+++ b/src/northbridge/via/vx900/early_smbus.c
@@ -19,6 +19,7 @@
 #include <device/early_smbus.h>
 
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <console/console.h>
 
 /**
diff --git a/src/northbridge/via/vx900/early_vx900.c b/src/northbridge/via/vx900/early_vx900.c
index fe858b6800..d5c702ccd1 100644
--- a/src/northbridge/via/vx900/early_vx900.c
+++ b/src/northbridge/via/vx900/early_vx900.c
@@ -16,6 +16,7 @@
 
 #include "early_vx900.h"
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <console/console.h>
 
 /**
diff --git a/src/northbridge/via/vx900/lpc.c b/src/northbridge/via/vx900/lpc.c
index 40c4299d95..221fe8e189 100644
--- a/src/northbridge/via/vx900/lpc.c
+++ b/src/northbridge/via/vx900/lpc.c
@@ -15,6 +15,7 @@
  */
 
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <arch/pirq_routing.h>
 #include <console/console.h>
 #include <device/pci.h>
diff --git a/src/northbridge/via/vx900/memmap.c b/src/northbridge/via/vx900/memmap.c
index 9940502d27..18d9635379 100644
--- a/src/northbridge/via/vx900/memmap.c
+++ b/src/northbridge/via/vx900/memmap.c
@@ -20,6 +20,7 @@
 #include "vx900.h"
 
 #include <device/pci.h>
+#include <device/pci_ops.h>
 #include <cbmem.h>
 
 #define MCU PCI_DEV(0, 0, 3)
diff --git a/src/northbridge/via/vx900/northbridge.c b/src/northbridge/via/vx900/northbridge.c
index 41a1073d89..0544c17a66 100644
--- a/src/northbridge/via/vx900/northbridge.c
+++ b/src/northbridge/via/vx900/northbridge.c
@@ -20,6 +20,7 @@
 #include <console/console.h>
 #include <device/device.h>
 #include <device/pci.h>
+#include <device/pci_ops.h>
 #include <device/pci_ids.h>
 #include <cpu/cpu.h>
 #include <cf9_reset.h>
diff --git a/src/northbridge/via/vx900/pcie.c b/src/northbridge/via/vx900/pcie.c
index 1d3ecd9938..b4d2723c75 100644
--- a/src/northbridge/via/vx900/pcie.c
+++ b/src/northbridge/via/vx900/pcie.c
@@ -15,6 +15,7 @@
  */
 
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <console/console.h>
 #include <device/pci.h>
 #include <device/pciexp.h>
diff --git a/src/northbridge/via/vx900/raminit_ddr3.c b/src/northbridge/via/vx900/raminit_ddr3.c
index 59d206c28c..e03470c704 100644
--- a/src/northbridge/via/vx900/raminit_ddr3.c
+++ b/src/northbridge/via/vx900/raminit_ddr3.c
@@ -17,6 +17,7 @@
 #include "early_vx900.h"
 #include "raminit.h"
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <console/console.h>
 #include <device/pci_ids.h>
 #include <delay.h>
diff --git a/src/northbridge/via/vx900/sata.c b/src/northbridge/via/vx900/sata.c
index d6f4c836c0..791133142f 100644
--- a/src/northbridge/via/vx900/sata.c
+++ b/src/northbridge/via/vx900/sata.c
@@ -16,6 +16,7 @@
 
 #include <console/console.h>
 #include <device/pci.h>
+#include <device/pci_ops.h>
 #include <device/pci_ids.h>
 
 #include "vx900.h"
diff --git a/src/northbridge/via/vx900/traf_ctrl.c b/src/northbridge/via/vx900/traf_ctrl.c
index 734defcf25..8f3f6023ad 100644
--- a/src/northbridge/via/vx900/traf_ctrl.c
+++ b/src/northbridge/via/vx900/traf_ctrl.c
@@ -15,6 +15,7 @@
  */
 
 #include <device/pci.h>
+#include <device/pci_ops.h>
 #include <device/pci_ids.h>
 #include <console/console.h>
 #include <drivers/generic/ioapic/chip.h>
diff --git a/src/northbridge/via/vx900/vx900.h b/src/northbridge/via/vx900/vx900.h
index 29fc472b3d..210a250eb2 100644
--- a/src/northbridge/via/vx900/vx900.h
+++ b/src/northbridge/via/vx900/vx900.h
@@ -27,8 +27,8 @@
 #define VX900_MAX_MEM_RANKS 4
 
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <device/pci.h>
-
 #include <console/console.h>
 
 u32 vx900_get_tolm(void);
-- 
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