From 56a684a2ee52b765fc69ec8c922c3da9d8ab7430 Mon Sep 17 00:00:00 2001 From: Stefan Reinauer Date: Wed, 7 Apr 2010 15:40:26 +0000 Subject: - copy_and_run() gets the same calling convention on AMD and on all the others. - some vx800 Kconfig fixes - remove warnings... Signed-off-by: Stefan Reinauer Acked-by: Stefan Reinauer git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5372 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/northbridge/via/vx800/pci_rawops.h | 235 ++++++++++++++++++--------------- 1 file changed, 126 insertions(+), 109 deletions(-) (limited to 'src/northbridge/via/vx800/pci_rawops.h') diff --git a/src/northbridge/via/vx800/pci_rawops.h b/src/northbridge/via/vx800/pci_rawops.h index d7646d550f..d0aa392a5a 100644 --- a/src/northbridge/via/vx800/pci_rawops.h +++ b/src/northbridge/via/vx800/pci_rawops.h @@ -26,243 +26,260 @@ (((SEGBUS) & 0xFFF) << 20) | \ (((DEV) & 0x1F) << 15) | \ (((FN) & 0x07) << 12)) -struct VIA_PCI_REG_INIT_TABLE { + +struct VIA_PCI_REG_INIT_TABLE { u8 ChipRevisionStart; u8 ChipRevisionEnd; u8 Bus; u8 Device; u8 Function; - u32 Register; + u32 Register; u8 Mask; u8 Value; }; -typedef unsigned device_t_raw; /* pci and pci_mmio need to have different ways to have dev */ +typedef unsigned device_t_raw; /* pci and pci_mmio need to have different ways to have dev */ /* FIXME: We need to make the coreboot to run at 64bit mode, So when read/write memory above 4G, * We don't need to set %fs, and %gs anymore * Before that We need to use %gs, and leave %fs to other RAM access */ - uint8_t pci_io_rawread_config8(device_t_raw dev, unsigned where) +u8 pci_io_rawread_config8(device_t_raw dev, unsigned where) { unsigned addr; -#if PCI_IO_CFG_EXT == 0 - addr = (dev>>4) | where; +#if CONFIG_PCI_IO_CFG_EXT == 0 + addr = (dev >> 4) | where; #else - addr = (dev>>4) | (where & 0xff) | ((where & 0xf00)<<16); //seg == 0 + addr = (dev >> 4) | (where & 0xff) | ((where & 0xf00) << 16); //seg == 0 #endif outl(0x80000000 | (addr & ~3), 0xCF8); return inb(0xCFC + (addr & 3)); } -#if MMCONF_SUPPORT - uint8_t pci_mmio_rawread_config8(device_t_raw dev, unsigned where) +#if CONFIG_MMCONF_SUPPORT +u8 pci_mmio_rawread_config8(device_t_raw dev, unsigned where) { - unsigned addr; - addr = dev | where; - return read8x(addr); + unsigned addr; + addr = dev | where; + return read8x(addr); } #endif - uint8_t pci_rawread_config8(device_t_raw dev, unsigned where) +u8 pci_rawread_config8(device_t_raw dev, unsigned where) { -#if MMCONF_SUPPORT +#if CONFIG_MMCONF_SUPPORT return pci_mmio_rawread_config8(dev, where); #else return pci_io_rawread_config8(dev, where); #endif } - uint16_t pci_io_rawread_config16(device_t_raw dev, unsigned where) +u16 pci_io_rawread_config16(device_t_raw dev, unsigned where) { unsigned addr; -#if PCI_IO_CFG_EXT == 0 - addr = (dev>>4) | where; +#if CONFIG_PCI_IO_CFG_EXT == 0 + addr = (dev >> 4) | where; #else - addr = (dev>>4) | (where & 0xff) | ((where & 0xf00)<<16); + addr = (dev >> 4) | (where & 0xff) | ((where & 0xf00) << 16); #endif outl(0x80000000 | (addr & ~3), 0xCF8); return inw(0xCFC + (addr & 2)); } -#if MMCONF_SUPPORT - uint16_t pci_mmio_rawread_config16(device_t_raw dev, unsigned where) +#if CONFIG_MMCONF_SUPPORT +u16 pci_mmio_rawread_config16(device_t_raw dev, unsigned where) { - unsigned addr; - addr = dev | where; - return read16x(addr); + unsigned addr; + addr = dev | where; + return read16x(addr); } #endif - uint16_t pci_rawread_config16(device_t_raw dev, unsigned where) +u16 pci_rawread_config16(device_t_raw dev, unsigned where) { -#if MMCONF_SUPPORT +#if CONFIG_MMCONF_SUPPORT return pci_mmio_rawread_config16(dev, where); #else - return pci_io_rawread_config16(dev, where); + return pci_io_rawread_config16(dev, where); #endif } - - uint32_t pci_io_rawread_config32(device_t_raw dev, unsigned where) +u32 pci_io_rawread_config32(device_t_raw dev, unsigned where) { unsigned addr; -#if PCI_IO_CFG_EXT == 0 - addr = (dev>>4) | where; +#if CONFIG_PCI_IO_CFG_EXT == 0 + addr = (dev >> 4) | where; #else - addr = (dev>>4) | (where & 0xff) | ((where & 0xf00)<<16); + addr = (dev >> 4) | (where & 0xff) | ((where & 0xf00) << 16); #endif outl(0x80000000 | (addr & ~3), 0xCF8); return inl(0xCFC); } -#if MMCONF_SUPPORT - uint32_t pci_mmio_rawread_config32(device_t_raw dev, unsigned where) +#if CONFIG_MMCONF_SUPPORT +u32 pci_mmio_rawread_config32(device_t_raw dev, unsigned where) { - unsigned addr; - addr = dev | where; - return read32x(addr); + unsigned addr; + addr = dev | where; + return read32x(addr); } #endif - uint32_t pci_rawread_config32(device_t_raw dev, unsigned where) +u32 pci_rawread_config32(device_t_raw dev, unsigned where) { -#if MMCONF_SUPPORT +#if CONFIG_MMCONF_SUPPORT return pci_mmio_rawread_config32(dev, where); #else - return pci_io_rawread_config32(dev, where); + return pci_io_rawread_config32(dev, where); #endif } - void pci_io_rawwrite_config8(device_t_raw dev, unsigned where, uint8_t value) +void pci_io_rawwrite_config8(device_t_raw dev, unsigned where, u8 value) { unsigned addr; -#if PCI_IO_CFG_EXT == 0 - addr = (dev>>4) | where; +#if CONFIG_PCI_IO_CFG_EXT == 0 + addr = (dev >> 4) | where; #else - addr = (dev>>4) | (where & 0xff) | ((where & 0xf00)<<16); + addr = (dev >> 4) | (where & 0xff) | ((where & 0xf00) << 16); #endif outl(0x80000000 | (addr & ~3), 0xCF8); outb(value, 0xCFC + (addr & 3)); } -#if MMCONF_SUPPORT - void pci_mmio_rawwrite_config8(device_t_raw dev, unsigned where, uint8_t value) +#if CONFIG_MMCONF_SUPPORT +void pci_mmio_rawwrite_config8(device_t_raw dev, unsigned where, u8 value) { - unsigned addr; - addr = dev | where; - write8x(addr, value); + unsigned addr; + addr = dev | where; + write8x(addr, value); } #endif - void pci_rawwrite_config8(device_t_raw dev, unsigned where, uint8_t value) +void pci_rawwrite_config8(device_t_raw dev, unsigned where, u8 value) { -#if MMCONF_SUPPORT +#if CONFIG_MMCONF_SUPPORT pci_mmio_rawwrite_config8(dev, where, value); #else - pci_io_rawwrite_config8(dev, where, value); + pci_io_rawwrite_config8(dev, where, value); #endif } - - void pci_io_rawwrite_config16(device_t_raw dev, unsigned where, uint16_t value) +void pci_io_rawwrite_config16(device_t_raw dev, unsigned where, u16 value) { - unsigned addr; -#if PCI_IO_CFG_EXT == 0 - addr = (dev>>4) | where; + unsigned addr; +#if CONFIG_PCI_IO_CFG_EXT == 0 + addr = (dev >> 4) | where; #else - addr = (dev>>4) | (where & 0xff) | ((where & 0xf00)<<16); + addr = (dev >> 4) | (where & 0xff) | ((where & 0xf00) << 16); #endif - outl(0x80000000 | (addr & ~3), 0xCF8); - outw(value, 0xCFC + (addr & 2)); + outl(0x80000000 | (addr & ~3), 0xCF8); + outw(value, 0xCFC + (addr & 2)); } -#if MMCONF_SUPPORT - void pci_mmio_rawwrite_config16(device_t_raw dev, unsigned where, uint16_t value) +#if CONFIG_MMCONF_SUPPORT +void pci_mmio_rawwrite_config16(device_t_raw dev, unsigned where, + u16 value) { - unsigned addr; - addr = dev | where; - write16x(addr, value); + unsigned addr; + addr = dev | where; + write16x(addr, value); } #endif - void pci_rawwrite_config16(device_t_raw dev, unsigned where, uint16_t value) +void pci_rawwrite_config16(device_t_raw dev, unsigned where, u16 value) { -#if MMCONF_SUPPORT +#if CONFIG_MMCONF_SUPPORT pci_mmio_rawwrite_config16(dev, where, value); #else pci_io_rawwrite_config16(dev, where, value); #endif } - - void pci_io_rawwrite_config32(device_t_raw dev, unsigned where, uint32_t value) +void pci_io_rawwrite_config32(device_t_raw dev, unsigned where, u32 value) { unsigned addr; -#if PCI_IO_CFG_EXT == 0 - addr = (dev>>4) | where; +#if CONFIG_PCI_IO_CFG_EXT == 0 + addr = (dev >> 4) | where; #else - addr = (dev>>4) | (where & 0xff) | ((where & 0xf00)<<16); + addr = (dev >> 4) | (where & 0xff) | ((where & 0xf00) << 16); #endif outl(0x80000000 | (addr & ~3), 0xCF8); outl(value, 0xCFC); } -#if MMCONF_SUPPORT - void pci_mmio_rawwrite_config32(device_t_raw dev, unsigned where, uint32_t value) +#if CONFIG_MMCONF_SUPPORT +void pci_mmio_rawwrite_config32(device_t_raw dev, unsigned where, + u32 value) { - unsigned addr; - addr = dev | where; - write32x(addr, value); + unsigned addr; + addr = dev | where; + write32x(addr, value); } #endif - void pci_rawwrite_config32(device_t_raw dev, unsigned where, uint32_t value) +void pci_rawwrite_config32(device_t_raw dev, unsigned where, u32 value) { -#if MMCONF_SUPPORT +#if CONFIG_MMCONF_SUPPORT pci_mmio_rawwrite_config32(dev, where, value); #else - pci_io_rawwrite_config32(dev, where, value); + pci_io_rawwrite_config32(dev, where, value); #endif } - -void pci_rawmodify_config8(device_t_raw dev, unsigned where, u8 orval,u8 mask) -{ u8 data=pci_rawread_config8(dev,where); - data&=(~mask); - data|=orval; - pci_rawwrite_config8(dev,where,data); +void pci_rawmodify_config8(device_t_raw dev, unsigned where, u8 orval, u8 mask) +{ + u8 data = pci_rawread_config8(dev, where); + data &= (~mask); + data |= orval; + pci_rawwrite_config8(dev, where, data); } -void pci_rawmodify_config16(device_t_raw dev, unsigned where, uint16_t orval,uint16_t mask) -{ uint16_t data=pci_rawread_config16(dev,where); - data&=(~mask); - data|=orval; - pci_rawwrite_config16(dev,where,data); + +void pci_rawmodify_config16(device_t_raw dev, unsigned where, u16 orval, u16 mask) +{ + u16 data = pci_rawread_config16(dev, where); + data &= (~mask); + data |= orval; + pci_rawwrite_config16(dev, where, data); } -void pci_rawmodify_config32(device_t_raw dev, unsigned where, uint32_t orval,uint32_t mask) -{ uint32_t data=pci_rawread_config32(dev,where); - data&=(~mask); - data|=orval; - pci_rawwrite_config32(dev,where,data); + +void pci_rawmodify_config32(device_t_raw dev, unsigned where, u32 orval, u32 mask) +{ + u32 data = pci_rawread_config32(dev, where); + data &= (~mask); + data |= orval; + pci_rawwrite_config32(dev, where, data); } -void io_rawmodify_config8(u16 where, uint8_t orval,uint8_t mask) +void io_rawmodify_config8(u16 where, u8 orval, u8 mask) { - u8 data=inb(where); - data&=(~mask); - data|=orval; - outb(data,where); + u8 data = inb(where); + data &= (~mask); + data |= orval; + outb(data, where); } -void via_pci_inittable(u8 chipversion,struct VIA_PCI_REG_INIT_TABLE* initdata) +void via_pci_inittable(u8 chipversion, + struct VIA_PCI_REG_INIT_TABLE *initdata) { - u8 i=0; + u8 i = 0; device_t_raw devbxdxfx; - for(i=0;;i++) { - if((initdata[i].Mask==0)&&(initdata[i].Value==0)&&(initdata[i].Bus==0)&&(initdata[i].ChipRevisionEnd==0xff)&&(initdata[i].ChipRevisionStart==0)&&(initdata[i].Device==0)&&(initdata[i].Function==0)&&(initdata[i].Register==0)) - break; - if((chipversion>=initdata[i].ChipRevisionStart)&&(chipversion<=initdata[i].ChipRevisionEnd)){ - devbxdxfx=PCI_RAWDEV(initdata[i].Bus,initdata[i].Device,initdata[i].Function); - pci_rawmodify_config8(devbxdxfx, initdata[i].Register,initdata[i].Value,initdata[i].Mask); - } + for (i = 0;; i++) { + if ((initdata[i].Mask == 0) && (initdata[i].Value == 0) + && (initdata[i].Bus == 0) + && (initdata[i].ChipRevisionEnd == 0xff) + && (initdata[i].ChipRevisionStart == 0) + && (initdata[i].Device == 0) + && (initdata[i].Function == 0) + && (initdata[i].Register == 0)) + break; + if ((chipversion >= initdata[i].ChipRevisionStart) + && (chipversion <= initdata[i].ChipRevisionEnd)) { + devbxdxfx = + PCI_RAWDEV(initdata[i].Bus, initdata[i].Device, + initdata[i].Function); + pci_rawmodify_config8(devbxdxfx, + initdata[i].Register, + initdata[i].Value, + initdata[i].Mask); + } } } #endif -- cgit v1.2.3