From 374c39e3cfbb51927860756d32a77d0afd3752a6 Mon Sep 17 00:00:00 2001 From: Elyes HAOUAS Date: Sat, 17 Sep 2016 18:57:12 +0200 Subject: northbridge/via: Add space around operators Change-Id: I87f8978b8ec6ddc11dd66a77cbb630e057f9831b Signed-off-by: Elyes HAOUAS Reviewed-on: https://review.coreboot.org/16623 Reviewed-by: Patrick Georgi Tested-by: build bot (Jenkins) --- src/northbridge/via/vx800/freq_setting.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) (limited to 'src/northbridge/via/vx800/freq_setting.c') diff --git a/src/northbridge/via/vx800/freq_setting.c b/src/northbridge/via/vx800/freq_setting.c index dc2e1bd62a..6e11704e28 100644 --- a/src/northbridge/via/vx800/freq_setting.c +++ b/src/northbridge/via/vx800/freq_setting.c @@ -196,13 +196,13 @@ void CalcCLAndFreq(DRAM_SYS_ATTR * DramAttr) } /* cycle time value - 0x25-->2.5ns Freq=400 DDR800 - 0x30-->3.0ns Freq=333 DDR667 - 0x3D-->3.75ns Freq=266 DDR533 - 0x50-->5.0ns Freq=200 DDR400 - 0x60-->6.0ns Freq=166 DDR333 - 0x75-->7.5ns Freq=133 DDR266 - 0xA0-->10.0ns Freq=100 DDR200 + 0x25-->2.5ns Freq = 400 DDR800 + 0x30-->3.0ns Freq = 333 DDR667 + 0x3D-->3.75ns Freq = 266 DDR533 + 0x50-->5.0ns Freq = 200 DDR400 + 0x60-->6.0ns Freq = 166 DDR333 + 0x75-->7.5ns Freq = 133 DDR266 + 0xA0-->10.0ns Freq = 100 DDR200 */ if (CycTime <= 0x25) { DramAttr->DramFreq = DIMMFREQ_800; -- cgit v1.2.3