From d4ebeaf475dc1137f489f12ffa4e55d914238662 Mon Sep 17 00:00:00 2001 From: Nico Huber Date: Mon, 22 May 2017 13:49:22 +0200 Subject: device/Kconfig: Put gfx init methods into a `choice` Provide all gfx init methods as a Kconfig `choice`. This elimates the option to select native gfx init along with running a Video BIOS. It's been only theoretically useful in one corner case: Hybrid graphics where only one controller is supported by native gfx init. Though I suppose in that case it's fair to assume that one would use SeaBIOS to run the VBIOS. For the case that we want the payload to initialize graphics or no pre-boot graphics at all, the new symbol NO_GFX_INIT was added to the choice. If multiple options are available, the default is chosen as follows: * NO_GFX_INIT, if we add a Video BIOS and the payload is SeaBIOS, * VGA_ROM_RUN, if we add a Video BIOS and the payload is not SeaBIOS, * NATIVE_VGA_INIT, if we don't add a Video BIOS. As a side effect, libgfxinit is now an independent choice. Change-Id: I06bc65ecf3724f299f59888a97219fdbd3d2d08b Signed-off-by: Nico Huber Reviewed-on: https://review.coreboot.org/19814 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/northbridge/intel/haswell/gma.c | 2 +- src/northbridge/intel/nehalem/gma.c | 62 ++++++++++++++++--------------- src/northbridge/intel/pineview/Kconfig | 5 +-- src/northbridge/intel/sandybridge/Kconfig | 4 +- src/northbridge/intel/sandybridge/gma.c | 3 +- 5 files changed, 39 insertions(+), 37 deletions(-) (limited to 'src/northbridge/intel') diff --git a/src/northbridge/intel/haswell/gma.c b/src/northbridge/intel/haswell/gma.c index a7478de128..1379539b4f 100644 --- a/src/northbridge/intel/haswell/gma.c +++ b/src/northbridge/intel/haswell/gma.c @@ -443,7 +443,7 @@ static void gma_func0_init(struct device *dev) /* Pre panel init */ gma_setup_panel(dev); - if (IS_ENABLED(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT)) { + if (IS_ENABLED(CONFIG_MAINBOARD_USE_LIBGFXINIT)) { printk(BIOS_SPEW, "NATIVE graphics, run native enable\n"); physbase = pci_read_config32(dev, 0x5c) & ~0xf; gma_gfxinit(gtt_res->base, linearfb_res->base, diff --git a/src/northbridge/intel/nehalem/gma.c b/src/northbridge/intel/nehalem/gma.c index 0af8d6c63a..43ca4b661a 100644 --- a/src/northbridge/intel/nehalem/gma.c +++ b/src/northbridge/intel/nehalem/gma.c @@ -1008,38 +1008,40 @@ static void gma_func0_init(struct device *dev) /* Init graphics power management */ gma_pm_init_pre_vbios(dev); -#if !CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT - /* PCI Init, will run VBIOS */ - pci_dev_init(dev); -#else - u32 physbase; - struct northbridge_intel_nehalem_config *conf = dev->chip_info; - struct resource *lfb_res; - struct resource *pio_res; - - lfb_res = find_resource(dev, PCI_BASE_ADDRESS_2); - pio_res = find_resource(dev, PCI_BASE_ADDRESS_4); - - physbase = pci_read_config32(dev, 0x5c) & ~0xf; - - if (gtt_res && gtt_res->base && physbase && pio_res && pio_res->base - && lfb_res && lfb_res->base) { - printk(BIOS_SPEW, "Initializing VGA without OPROM. MMIO 0x%llx\n", - gtt_res->base); - if (IS_ENABLED(CONFIG_MAINBOARD_USE_LIBGFXINIT)) { - int lightup_ok; - gma_gfxinit(gtt_res->base, lfb_res->base, - physbase, &lightup_ok); - } else { - intel_gma_init(conf, res2mmio(gtt_res, 0, 0), physbase, - pio_res->base, lfb_res->base); + if (IS_ENABLED(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT) || + IS_ENABLED(CONFIG_MAINBOARD_USE_LIBGFXINIT)) { + u32 physbase; + struct northbridge_intel_nehalem_config *conf = dev->chip_info; + struct resource *lfb_res; + struct resource *pio_res; + + lfb_res = find_resource(dev, PCI_BASE_ADDRESS_2); + pio_res = find_resource(dev, PCI_BASE_ADDRESS_4); + + physbase = pci_read_config32(dev, 0x5c) & ~0xf; + + if (gtt_res && gtt_res->base && physbase && + pio_res && pio_res->base && lfb_res && lfb_res->base) { + printk(BIOS_SPEW, + "Initializing VGA without OPROM. MMIO 0x%llx\n", + gtt_res->base); + if (IS_ENABLED(CONFIG_MAINBOARD_USE_LIBGFXINIT)) { + int lightup_ok; + gma_gfxinit(gtt_res->base, lfb_res->base, + physbase, &lightup_ok); + } else { + intel_gma_init(conf, res2mmio(gtt_res, 0, 0), + physbase, pio_res->base, lfb_res->base); + } } - } - - /* Linux relies on VBT for panel info. */ - generate_fake_intel_oprom(&conf->gfx, dev, "$VBT IRONLAKE-MOBILE"); -#endif + /* Linux relies on VBT for panel info. */ + generate_fake_intel_oprom(&conf->gfx, dev, + "$VBT IRONLAKE-MOBILE"); + } else { + /* PCI Init, will run VBIOS */ + pci_dev_init(dev); + } /* Post VBIOS init */ gma_pm_init_post_vbios(dev); diff --git a/src/northbridge/intel/pineview/Kconfig b/src/northbridge/intel/pineview/Kconfig index cf659efb1a..1af8d3cb4c 100644 --- a/src/northbridge/intel/pineview/Kconfig +++ b/src/northbridge/intel/pineview/Kconfig @@ -26,12 +26,9 @@ config NORTHBRIDGE_SPECIFIC_OPTIONS # dummy select VGA select MAINBOARD_HAS_NATIVE_VGA_INIT select HAVE_VGA_TEXT_FRAMEBUFFER if MAINBOARD_DO_NATIVE_VGA_INIT + select INTEL_EDID if MAINBOARD_DO_NATIVE_VGA_INIT select RELOCATABLE_RAMSTAGE -config MAINBOARD_DO_NATIVE_VGA_INIT - def_bool y - select INTEL_EDID - config BOOTBLOCK_NORTHBRIDGE_INIT string default "northbridge/intel/pineview/bootblock.c" diff --git a/src/northbridge/intel/sandybridge/Kconfig b/src/northbridge/intel/sandybridge/Kconfig index ad1ceae531..b52807cc94 100644 --- a/src/northbridge/intel/sandybridge/Kconfig +++ b/src/northbridge/intel/sandybridge/Kconfig @@ -59,7 +59,9 @@ config SANDYBRIDGE_IVYBRIDGE_LVDS select VGA select MAINBOARD_HAS_NATIVE_VGA_INIT -config MAINBOARD_DO_NATIVE_VGA_INIT +config IF_NATIVE_VGA_INIT + def_bool y + depends on MAINBOARD_DO_NATIVE_VGA_INIT select VGA select INTEL_EDID select HAVE_LINEAR_FRAMEBUFFER diff --git a/src/northbridge/intel/sandybridge/gma.c b/src/northbridge/intel/sandybridge/gma.c index 868a961fb8..bc64fe695b 100644 --- a/src/northbridge/intel/sandybridge/gma.c +++ b/src/northbridge/intel/sandybridge/gma.c @@ -595,7 +595,8 @@ static void gma_func0_init(struct device *dev) /* Post VBIOS init */ gma_pm_init_post_vbios(dev); - if (IS_ENABLED(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT)) { + if (IS_ENABLED(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT) || + IS_ENABLED(CONFIG_MAINBOARD_USE_LIBGFXINIT)) { /* This should probably run before post VBIOS init. */ printk(BIOS_SPEW, "Initializing VGA without OPROM.\n"); u8 *mmiobase; -- cgit v1.2.3