From bfc80098dad6a62c7cba0dd0043d46ad570e4e22 Mon Sep 17 00:00:00 2001
From: Angel Pons <th3fanbus@gmail.com>
Date: Tue, 7 Jul 2020 03:03:43 +0200
Subject: nb/intel/pineview: Convert to ASL 2.0 syntax

Tested with BUILD_TIMELESS=1, Foxconn D41S does not change.

Change-Id: Ibc0988c4c86f7ffef8692ff3cf3ebd92235156b5
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43168
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
 src/northbridge/intel/pineview/acpi/hostbridge.asl | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

(limited to 'src/northbridge/intel')

diff --git a/src/northbridge/intel/pineview/acpi/hostbridge.asl b/src/northbridge/intel/pineview/acpi/hostbridge.asl
index 0a9897c69d..dae0b77e4e 100644
--- a/src/northbridge/intel/pineview/acpi/hostbridge.asl
+++ b/src/northbridge/intel/pineview/acpi/hostbridge.asl
@@ -208,8 +208,8 @@ Method (_CRS, 0, Serialized)
 	 * Enter actual TOLUD. The TOLUD register contains bits 27-31 of
 	 * the top of memory address.
 	 */
-	ShiftLeft (^MCHC.TLUD, 27, PMIN)
-	Add(Subtract(PMAX, PMIN), 1, PLEN)
+	PMIN = ^MCHC.TLUD << 27
+	PLEN = PMAX - PMIN + 1
 
 	Return (MCRS)
 }
-- 
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