From ab50d62ea6867712eca79e9f0770d6ac35f72ce1 Mon Sep 17 00:00:00 2001 From: Uwe Hermann Date: Wed, 13 Oct 2010 08:21:44 +0000 Subject: Convert all Intel i810 boards to CAR. - Drop "select ROMCC" from the boards, as well as early_mtrr stuff. - Add "select CACHE_AS_RAM" to socket_PGA370/Kconfig, as well as the usual DCACHE_RAM_BASE and DCACHE_RAM_SIZE variables. - In socket_PGA370/Makefile.inc add: cpu_incs += $(src)/cpu/intel/car/cache_as_ram.inc - Other smaller related fixes. Abuild-tested and boot-tested on MSI MS-6178. Signed-off-by: Uwe Hermann Acked-by: Peter Stuge git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5949 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/northbridge/intel/i82810/debug.c | 3 ++- src/northbridge/intel/i82810/raminit.c | 5 +++++ 2 files changed, 7 insertions(+), 1 deletion(-) (limited to 'src/northbridge/intel') diff --git a/src/northbridge/intel/i82810/debug.c b/src/northbridge/intel/i82810/debug.c index 5bddbb60a3..55af01bc22 100644 --- a/src/northbridge/intel/i82810/debug.c +++ b/src/northbridge/intel/i82810/debug.c @@ -1,6 +1,6 @@ - static void dump_spd_registers(void) { +#if CONFIG_DEBUG_RAM_SETUP int i; print_debug("\n"); for(i = 0; i < DIMM_SOCKETS; i++) { @@ -32,4 +32,5 @@ static void dump_spd_registers(void) print_debug("\n"); } } +#endif } diff --git a/src/northbridge/intel/i82810/raminit.c b/src/northbridge/intel/i82810/raminit.c index 9927cb65c0..3ddc8a02e6 100644 --- a/src/northbridge/intel/i82810/raminit.c +++ b/src/northbridge/intel/i82810/raminit.c @@ -137,6 +137,11 @@ struct dimm_info { SDRAM configuration functions. -----------------------------------------------------------------------------*/ +static inline int spd_read_byte(unsigned device, unsigned address) +{ + return smbus_read_byte(device, address); +} + /** * Send the specified RAM command to all DIMMs. * -- cgit v1.2.3