From 78b43c8990a7e3331dd5a0bd2484a53956f546aa Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Tue, 17 Mar 2020 23:55:18 +0100 Subject: nb/intel/sandybridge: Always write to PEGCTL This register needs to be written to once to lock it down. Do so. Change-Id: I04bd496d064940b51cb9aa1ded6f5b8853ea7334 Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/coreboot/+/39624 Reviewed-by: Arthur Heymans Reviewed-by: Felix Held Tested-by: build bot (Jenkins) --- src/northbridge/intel/sandybridge/northbridge.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'src/northbridge/intel') diff --git a/src/northbridge/intel/sandybridge/northbridge.c b/src/northbridge/intel/sandybridge/northbridge.c index 23c1489acb..abfc1259de 100644 --- a/src/northbridge/intel/sandybridge/northbridge.c +++ b/src/northbridge/intel/sandybridge/northbridge.c @@ -377,11 +377,12 @@ static void disable_peg(void) /* * Set the PEG clock gating bit. Disables the IO clock on all PEG devices. * - * FIXME: If not clock gating, this register still needs to be written to once, - * to lock it down. Also, never clock gate on Ivy Bridge stepping A0! + * FIXME: Never clock gate on Ivy Bridge stepping A0! */ MCHBAR32_OR(PEGCTL, 1); printk(BIOS_DEBUG, "Disabling PEG IO clock.\n"); + } else { + MCHBAR32_AND(PEGCTL, ~1); } } -- cgit v1.2.3