From 6b5bc77c9b22c398262ff3f4dae3e14904c57366 Mon Sep 17 00:00:00 2001
From: Patrick Georgi <pgeorgi@google.com>
Date: Sun, 10 May 2020 16:41:01 +0200
Subject: treewide: Remove "this file is part of" lines

Stefan thinks they don't add value.

Command used:
sed -i -e '/file is part of /d' $(git grep "file is part of " |egrep ":( */\*.*\*/\$|#|;#|-- | *\* )" | cut -d: -f1 |grep -v crossgcc |grep -v gcov | grep -v /elf.h |grep -v nvramtool)

The exceptions are for:
 - crossgcc (patch file)
 - gcov (imported from gcc)
 - elf.h (imported from GNU's libc)
 - nvramtool (more complicated header)

The removed lines are:
-       fmt.Fprintln(f, "/* This file is part of the coreboot project. */")
-# This file is part of a set of unofficial pre-commit hooks available
-/* This file is part of coreboot */
-# This file is part of msrtool.
-/* This file is part of msrtool. */
- * This file is part of ncurses, designed to be appended after curses.h.in
-/* This file is part of pgtblgen. */
- * This file is part of the coreboot project.
- /* This file is part of the coreboot project. */
-#  This file is part of the coreboot project.
-# This file is part of the coreboot project.
-## This file is part of the coreboot project.
--- This file is part of the coreboot project.
-/* This file is part of the coreboot project */
-/* This file is part of the coreboot project. */
-;## This file is part of the coreboot project.
-# This file is part of the coreboot project. It originated in the
- * This file is part of the coreinfo project.
-## This file is part of the coreinfo project.
- * This file is part of the depthcharge project.
-/* This file is part of the depthcharge project. */
-/* This file is part of the ectool project. */
- * This file is part of the GNU C Library.
- * This file is part of the libpayload project.
-## This file is part of the libpayload project.
-/* This file is part of the Linux kernel. */
-## This file is part of the superiotool project.
-/* This file is part of the superiotool project */
-/* This file is part of uio_usbdebug */

Change-Id: I82d872b3b337388c93d5f5bf704e9ee9e53ab3a9
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41194
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
 src/northbridge/intel/e7505/Kconfig                             | 1 -
 src/northbridge/intel/e7505/e7505.h                             | 1 -
 src/northbridge/intel/e7505/memmap.c                            | 1 -
 src/northbridge/intel/e7505/northbridge.c                       | 1 -
 src/northbridge/intel/e7505/raminit.c                           | 1 -
 src/northbridge/intel/e7505/raminit.h                           | 1 -
 src/northbridge/intel/e7505/romstage.c                          | 1 -
 src/northbridge/intel/gm45/Kconfig                              | 1 -
 src/northbridge/intel/gm45/Makefile.inc                         | 1 -
 src/northbridge/intel/gm45/acpi.c                               | 1 -
 src/northbridge/intel/gm45/acpi/gm45.asl                        | 1 -
 src/northbridge/intel/gm45/acpi/hostbridge.asl                  | 1 -
 src/northbridge/intel/gm45/acpi/peg.asl                         | 1 -
 src/northbridge/intel/gm45/bootblock.c                          | 1 -
 src/northbridge/intel/gm45/chip.h                               | 1 -
 src/northbridge/intel/gm45/early_init.c                         | 1 -
 src/northbridge/intel/gm45/early_reset.c                        | 1 -
 src/northbridge/intel/gm45/gm45.h                               | 1 -
 src/northbridge/intel/gm45/gma.c                                | 1 -
 src/northbridge/intel/gm45/igd.c                                | 1 -
 src/northbridge/intel/gm45/iommu.c                              | 1 -
 src/northbridge/intel/gm45/memmap.c                             | 1 -
 src/northbridge/intel/gm45/northbridge.c                        | 1 -
 src/northbridge/intel/gm45/pcie.c                               | 1 -
 src/northbridge/intel/gm45/pm.c                                 | 1 -
 src/northbridge/intel/gm45/raminit.c                            | 1 -
 src/northbridge/intel/gm45/raminit_rcomp_calibration.c          | 1 -
 src/northbridge/intel/gm45/raminit_read_write_training.c        | 1 -
 src/northbridge/intel/gm45/raminit_receive_enable_calibration.c | 1 -
 src/northbridge/intel/gm45/romstage.c                           | 1 -
 src/northbridge/intel/gm45/thermal.c                            | 1 -
 src/northbridge/intel/haswell/Kconfig                           | 1 -
 src/northbridge/intel/haswell/Makefile.inc                      | 1 -
 src/northbridge/intel/haswell/acpi.c                            | 1 -
 src/northbridge/intel/haswell/acpi/haswell.asl                  | 1 -
 src/northbridge/intel/haswell/acpi/hostbridge.asl               | 1 -
 src/northbridge/intel/haswell/acpi/peg.asl                      | 1 -
 src/northbridge/intel/haswell/bootblock.c                       | 1 -
 src/northbridge/intel/haswell/chip.h                            | 1 -
 src/northbridge/intel/haswell/early_init.c                      | 1 -
 src/northbridge/intel/haswell/finalize.c                        | 1 -
 src/northbridge/intel/haswell/gma.c                             | 1 -
 src/northbridge/intel/haswell/haswell.h                         | 1 -
 src/northbridge/intel/haswell/mchbar_regs.h                     | 1 -
 src/northbridge/intel/haswell/memmap.c                          | 1 -
 src/northbridge/intel/haswell/minihd.c                          | 1 -
 src/northbridge/intel/haswell/northbridge.c                     | 1 -
 src/northbridge/intel/haswell/pcie.c                            | 1 -
 src/northbridge/intel/haswell/raminit.c                         | 1 -
 src/northbridge/intel/haswell/raminit.h                         | 1 -
 src/northbridge/intel/haswell/report_platform.c                 | 1 -
 src/northbridge/intel/i440bx/Kconfig                            | 1 -
 src/northbridge/intel/i440bx/Makefile.inc                       | 1 -
 src/northbridge/intel/i440bx/acpi/sb_pci0_crs.asl               | 1 -
 src/northbridge/intel/i440bx/debug.c                            | 1 -
 src/northbridge/intel/i440bx/i440bx.h                           | 1 -
 src/northbridge/intel/i440bx/memmap.c                           | 1 -
 src/northbridge/intel/i440bx/northbridge.c                      | 1 -
 src/northbridge/intel/i440bx/raminit.c                          | 1 -
 src/northbridge/intel/i440bx/raminit.h                          | 1 -
 src/northbridge/intel/i440bx/romstage.c                         | 1 -
 src/northbridge/intel/i945/Kconfig                              | 1 -
 src/northbridge/intel/i945/Makefile.inc                         | 1 -
 src/northbridge/intel/i945/acpi.c                               | 1 -
 src/northbridge/intel/i945/acpi/hostbridge.asl                  | 1 -
 src/northbridge/intel/i945/acpi/i945.asl                        | 1 -
 src/northbridge/intel/i945/acpi/igd.asl                         | 1 -
 src/northbridge/intel/i945/acpi/peg.asl                         | 1 -
 src/northbridge/intel/i945/bootblock.c                          | 1 -
 src/northbridge/intel/i945/chip.h                               | 1 -
 src/northbridge/intel/i945/debug.c                              | 1 -
 src/northbridge/intel/i945/early_init.c                         | 1 -
 src/northbridge/intel/i945/errata.c                             | 1 -
 src/northbridge/intel/i945/gma.c                                | 1 -
 src/northbridge/intel/i945/i945.h                               | 1 -
 src/northbridge/intel/i945/memmap.c                             | 1 -
 src/northbridge/intel/i945/northbridge.c                        | 1 -
 src/northbridge/intel/i945/raminit.c                            | 1 -
 src/northbridge/intel/i945/raminit.h                            | 1 -
 src/northbridge/intel/i945/rcven.c                              | 1 -
 src/northbridge/intel/i945/romstage.c                           | 1 -
 src/northbridge/intel/ironlake/Kconfig                          | 1 -
 src/northbridge/intel/ironlake/Makefile.inc                     | 1 -
 src/northbridge/intel/ironlake/acpi.c                           | 1 -
 src/northbridge/intel/ironlake/acpi/hostbridge.asl              | 1 -
 src/northbridge/intel/ironlake/acpi/ironlake.asl                | 1 -
 src/northbridge/intel/ironlake/bootblock.c                      | 1 -
 src/northbridge/intel/ironlake/chip.h                           | 1 -
 src/northbridge/intel/ironlake/early_init.c                     | 1 -
 src/northbridge/intel/ironlake/finalize.c                       | 1 -
 src/northbridge/intel/ironlake/gma.c                            | 1 -
 src/northbridge/intel/ironlake/ironlake.h                       | 1 -
 src/northbridge/intel/ironlake/memmap.c                         | 1 -
 src/northbridge/intel/ironlake/northbridge.c                    | 1 -
 src/northbridge/intel/ironlake/raminit.c                        | 1 -
 src/northbridge/intel/ironlake/raminit.h                        | 1 -
 src/northbridge/intel/ironlake/raminit_tables.c                 | 1 -
 src/northbridge/intel/ironlake/raminit_tables.h                 | 1 -
 src/northbridge/intel/ironlake/romstage.c                       | 1 -
 src/northbridge/intel/ironlake/smi.c                            | 1 -
 src/northbridge/intel/pineview/Kconfig                          | 1 -
 src/northbridge/intel/pineview/Makefile.inc                     | 1 -
 src/northbridge/intel/pineview/acpi.c                           | 1 -
 src/northbridge/intel/pineview/acpi/hostbridge.asl              | 1 -
 src/northbridge/intel/pineview/acpi/peg.asl                     | 1 -
 src/northbridge/intel/pineview/acpi/pineview.asl                | 1 -
 src/northbridge/intel/pineview/bootblock.c                      | 1 -
 src/northbridge/intel/pineview/chip.h                           | 1 -
 src/northbridge/intel/pineview/early_init.c                     | 1 -
 src/northbridge/intel/pineview/gma.c                            | 1 -
 src/northbridge/intel/pineview/iomap.h                          | 1 -
 src/northbridge/intel/pineview/mchbar_regs.h                    | 1 -
 src/northbridge/intel/pineview/memmap.c                         | 1 -
 src/northbridge/intel/pineview/northbridge.c                    | 1 -
 src/northbridge/intel/pineview/pineview.h                       | 1 -
 src/northbridge/intel/pineview/raminit.c                        | 1 -
 src/northbridge/intel/pineview/raminit.h                        | 1 -
 src/northbridge/intel/pineview/romstage.c                       | 1 -
 src/northbridge/intel/sandybridge/Kconfig                       | 1 -
 src/northbridge/intel/sandybridge/Makefile.inc                  | 1 -
 src/northbridge/intel/sandybridge/acpi.c                        | 1 -
 src/northbridge/intel/sandybridge/acpi/hostbridge.asl           | 1 -
 src/northbridge/intel/sandybridge/acpi/peg.asl                  | 1 -
 src/northbridge/intel/sandybridge/acpi/sandybridge.asl          | 1 -
 src/northbridge/intel/sandybridge/bootblock.c                   | 1 -
 src/northbridge/intel/sandybridge/chip.h                        | 1 -
 src/northbridge/intel/sandybridge/common.c                      | 1 -
 src/northbridge/intel/sandybridge/early_dmi.c                   | 1 -
 src/northbridge/intel/sandybridge/early_init.c                  | 1 -
 src/northbridge/intel/sandybridge/finalize.c                    | 1 -
 src/northbridge/intel/sandybridge/gma.c                         | 1 -
 src/northbridge/intel/sandybridge/gma.h                         | 1 -
 src/northbridge/intel/sandybridge/mchbar_regs.h                 | 1 -
 src/northbridge/intel/sandybridge/memmap.c                      | 1 -
 src/northbridge/intel/sandybridge/northbridge.c                 | 1 -
 src/northbridge/intel/sandybridge/pcie.c                        | 1 -
 src/northbridge/intel/sandybridge/raminit.c                     | 1 -
 src/northbridge/intel/sandybridge/raminit.h                     | 1 -
 src/northbridge/intel/sandybridge/raminit_common.c              | 1 -
 src/northbridge/intel/sandybridge/raminit_common.h              | 1 -
 src/northbridge/intel/sandybridge/raminit_mrc.c                 | 1 -
 src/northbridge/intel/sandybridge/raminit_native.c              | 1 -
 src/northbridge/intel/sandybridge/raminit_native.h              | 1 -
 src/northbridge/intel/sandybridge/raminit_shared.c              | 1 -
 src/northbridge/intel/sandybridge/raminit_tables.c              | 1 -
 src/northbridge/intel/sandybridge/raminit_tables.h              | 1 -
 src/northbridge/intel/sandybridge/romstage.c                    | 1 -
 src/northbridge/intel/sandybridge/sandybridge.h                 | 1 -
 src/northbridge/intel/x4x/Kconfig                               | 1 -
 src/northbridge/intel/x4x/Makefile.inc                          | 1 -
 src/northbridge/intel/x4x/acpi.c                                | 1 -
 src/northbridge/intel/x4x/acpi/hostbridge.asl                   | 1 -
 src/northbridge/intel/x4x/acpi/peg.asl                          | 1 -
 src/northbridge/intel/x4x/acpi/x4x.asl                          | 1 -
 src/northbridge/intel/x4x/bootblock.c                           | 1 -
 src/northbridge/intel/x4x/chip.h                                | 1 -
 src/northbridge/intel/x4x/dq_dqs.c                              | 1 -
 src/northbridge/intel/x4x/early_init.c                          | 1 -
 src/northbridge/intel/x4x/gma.c                                 | 1 -
 src/northbridge/intel/x4x/iomap.h                               | 1 -
 src/northbridge/intel/x4x/memmap.c                              | 1 -
 src/northbridge/intel/x4x/northbridge.c                         | 1 -
 src/northbridge/intel/x4x/raminit.c                             | 1 -
 src/northbridge/intel/x4x/raminit_ddr23.c                       | 1 -
 src/northbridge/intel/x4x/raminit_tables.c                      | 1 -
 src/northbridge/intel/x4x/rcven.c                               | 1 -
 src/northbridge/intel/x4x/romstage.c                            | 1 -
 src/northbridge/intel/x4x/x4x.h                                 | 1 -
 168 files changed, 168 deletions(-)

(limited to 'src/northbridge/intel')

diff --git a/src/northbridge/intel/e7505/Kconfig b/src/northbridge/intel/e7505/Kconfig
index 0e49a21b4d..32fe1cffbf 100644
--- a/src/northbridge/intel/e7505/Kconfig
+++ b/src/northbridge/intel/e7505/Kconfig
@@ -1,4 +1,3 @@
-# This file is part of the coreboot project.
 # SPDX-License-Identifier: GPL-2.0-only
 
 config NORTHBRIDGE_INTEL_E7505
diff --git a/src/northbridge/intel/e7505/e7505.h b/src/northbridge/intel/e7505/e7505.h
index fe80bfd87c..b429c70ba4 100644
--- a/src/northbridge/intel/e7505/e7505.h
+++ b/src/northbridge/intel/e7505/e7505.h
@@ -1,4 +1,3 @@
-/* This file is part of the coreboot project. */
 /* SPDX-License-Identifier: GPL-2.0-or-later */
 
 /*
diff --git a/src/northbridge/intel/e7505/memmap.c b/src/northbridge/intel/e7505/memmap.c
index 7d0ac3713b..92b2ae7740 100644
--- a/src/northbridge/intel/e7505/memmap.c
+++ b/src/northbridge/intel/e7505/memmap.c
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 // Use simple device model for this file even in ramstage
 #define __SIMPLE_DEVICE__
diff --git a/src/northbridge/intel/e7505/northbridge.c b/src/northbridge/intel/e7505/northbridge.c
index e8944669a3..e6be17b53e 100644
--- a/src/northbridge/intel/e7505/northbridge.c
+++ b/src/northbridge/intel/e7505/northbridge.c
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <acpi/acpi.h>
 #include <console/console.h>
diff --git a/src/northbridge/intel/e7505/raminit.c b/src/northbridge/intel/e7505/raminit.c
index fd88193b91..65db922b5e 100644
--- a/src/northbridge/intel/e7505/raminit.c
+++ b/src/northbridge/intel/e7505/raminit.c
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 /* This was originally for the e7500, modified for e7501
  * The primary differences are that 7501 apparently can
diff --git a/src/northbridge/intel/e7505/raminit.h b/src/northbridge/intel/e7505/raminit.h
index a623e3519a..1e0128ce72 100644
--- a/src/northbridge/intel/e7505/raminit.h
+++ b/src/northbridge/intel/e7505/raminit.h
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #ifndef RAMINIT_H
 #define RAMINIT_H
diff --git a/src/northbridge/intel/e7505/romstage.c b/src/northbridge/intel/e7505/romstage.c
index e2cbf661ac..df10f9dbcf 100644
--- a/src/northbridge/intel/e7505/romstage.c
+++ b/src/northbridge/intel/e7505/romstage.c
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <cbmem.h>
 #include <arch/romstage.h>
diff --git a/src/northbridge/intel/gm45/Kconfig b/src/northbridge/intel/gm45/Kconfig
index 7edea51dfd..f5d6712386 100644
--- a/src/northbridge/intel/gm45/Kconfig
+++ b/src/northbridge/intel/gm45/Kconfig
@@ -1,4 +1,3 @@
-# This file is part of the coreboot project.
 # SPDX-License-Identifier: GPL-2.0-only
 
 config NORTHBRIDGE_INTEL_GM45
diff --git a/src/northbridge/intel/gm45/Makefile.inc b/src/northbridge/intel/gm45/Makefile.inc
index 9228a1f4e2..17e510822a 100644
--- a/src/northbridge/intel/gm45/Makefile.inc
+++ b/src/northbridge/intel/gm45/Makefile.inc
@@ -1,5 +1,4 @@
 #
-# This file is part of the coreboot project.
 #
 #
 # SPDX-License-Identifier: GPL-2.0-only
diff --git a/src/northbridge/intel/gm45/acpi.c b/src/northbridge/intel/gm45/acpi.c
index c81d21f0d0..7a5d0b1ce5 100644
--- a/src/northbridge/intel/gm45/acpi.c
+++ b/src/northbridge/intel/gm45/acpi.c
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <types.h>
 #include <console/console.h>
diff --git a/src/northbridge/intel/gm45/acpi/gm45.asl b/src/northbridge/intel/gm45/acpi/gm45.asl
index 270ad90c32..7d64200ddb 100644
--- a/src/northbridge/intel/gm45/acpi/gm45.asl
+++ b/src/northbridge/intel/gm45/acpi/gm45.asl
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include "hostbridge.asl"
 #include "../gm45.h"
diff --git a/src/northbridge/intel/gm45/acpi/hostbridge.asl b/src/northbridge/intel/gm45/acpi/hostbridge.asl
index d09d44dfb0..bafedff2c8 100644
--- a/src/northbridge/intel/gm45/acpi/hostbridge.asl
+++ b/src/northbridge/intel/gm45/acpi/hostbridge.asl
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <arch/ioapic.h>
 
diff --git a/src/northbridge/intel/gm45/acpi/peg.asl b/src/northbridge/intel/gm45/acpi/peg.asl
index 7dc67183b2..f85a22c08b 100644
--- a/src/northbridge/intel/gm45/acpi/peg.asl
+++ b/src/northbridge/intel/gm45/acpi/peg.asl
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 Device (PEGP)
 {
diff --git a/src/northbridge/intel/gm45/bootblock.c b/src/northbridge/intel/gm45/bootblock.c
index b10a75d454..e74354ebdb 100644
--- a/src/northbridge/intel/gm45/bootblock.c
+++ b/src/northbridge/intel/gm45/bootblock.c
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <arch/bootblock.h>
 #include <device/pci_ops.h>
diff --git a/src/northbridge/intel/gm45/chip.h b/src/northbridge/intel/gm45/chip.h
index a8a549d72e..0d09bb40ef 100644
--- a/src/northbridge/intel/gm45/chip.h
+++ b/src/northbridge/intel/gm45/chip.h
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #ifndef NORTHBRIDGE_INTEL_GM45_CHIP_H
 #define NORTHBRIDGE_INTEL_GM45_CHIP_H
diff --git a/src/northbridge/intel/gm45/early_init.c b/src/northbridge/intel/gm45/early_init.c
index 712932aad5..1be351890b 100644
--- a/src/northbridge/intel/gm45/early_init.c
+++ b/src/northbridge/intel/gm45/early_init.c
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <stdint.h>
 #include <device/pci_ops.h>
diff --git a/src/northbridge/intel/gm45/early_reset.c b/src/northbridge/intel/gm45/early_reset.c
index eff89bfd3d..44917465d6 100644
--- a/src/northbridge/intel/gm45/early_reset.c
+++ b/src/northbridge/intel/gm45/early_reset.c
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <types.h>
 #include <cf9_reset.h>
diff --git a/src/northbridge/intel/gm45/gm45.h b/src/northbridge/intel/gm45/gm45.h
index 423a8f25eb..d9cfbf7090 100644
--- a/src/northbridge/intel/gm45/gm45.h
+++ b/src/northbridge/intel/gm45/gm45.h
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #ifndef __NORTHBRIDGE_INTEL_GM45_GM45_H__
 #define __NORTHBRIDGE_INTEL_GM45_GM45_H__
diff --git a/src/northbridge/intel/gm45/gma.c b/src/northbridge/intel/gm45/gma.c
index 8a38bdf4ea..0c97b64b39 100644
--- a/src/northbridge/intel/gm45/gma.c
+++ b/src/northbridge/intel/gm45/gma.c
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <device/mmio.h>
 #include <console/console.h>
diff --git a/src/northbridge/intel/gm45/igd.c b/src/northbridge/intel/gm45/igd.c
index 173af1bc5c..10a6f84875 100644
--- a/src/northbridge/intel/gm45/igd.c
+++ b/src/northbridge/intel/gm45/igd.c
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <stdint.h>
 #include <stddef.h>
diff --git a/src/northbridge/intel/gm45/iommu.c b/src/northbridge/intel/gm45/iommu.c
index 4d88e3609d..422655409a 100644
--- a/src/northbridge/intel/gm45/iommu.c
+++ b/src/northbridge/intel/gm45/iommu.c
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <stdint.h>
 #include <string.h>
diff --git a/src/northbridge/intel/gm45/memmap.c b/src/northbridge/intel/gm45/memmap.c
index 0d03731d47..4fe3998bee 100644
--- a/src/northbridge/intel/gm45/memmap.c
+++ b/src/northbridge/intel/gm45/memmap.c
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 // Use simple device model for this file even in ramstage
 #define __SIMPLE_DEVICE__
diff --git a/src/northbridge/intel/gm45/northbridge.c b/src/northbridge/intel/gm45/northbridge.c
index d566120827..cd64dfe3dd 100644
--- a/src/northbridge/intel/gm45/northbridge.c
+++ b/src/northbridge/intel/gm45/northbridge.c
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <cbmem.h>
 #include <console/console.h>
diff --git a/src/northbridge/intel/gm45/pcie.c b/src/northbridge/intel/gm45/pcie.c
index 0337c55e58..2cab42f4bb 100644
--- a/src/northbridge/intel/gm45/pcie.c
+++ b/src/northbridge/intel/gm45/pcie.c
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <stdint.h>
 #include <stddef.h>
diff --git a/src/northbridge/intel/gm45/pm.c b/src/northbridge/intel/gm45/pm.c
index 5e03a3ca12..6033c0aca2 100644
--- a/src/northbridge/intel/gm45/pm.c
+++ b/src/northbridge/intel/gm45/pm.c
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <stdint.h>
 #include <stddef.h>
diff --git a/src/northbridge/intel/gm45/raminit.c b/src/northbridge/intel/gm45/raminit.c
index e6582ad53c..fbf9f01cfa 100644
--- a/src/northbridge/intel/gm45/raminit.c
+++ b/src/northbridge/intel/gm45/raminit.c
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <commonlib/helpers.h>
 #include <stdint.h>
diff --git a/src/northbridge/intel/gm45/raminit_rcomp_calibration.c b/src/northbridge/intel/gm45/raminit_rcomp_calibration.c
index ee6544b9d2..94da2dc589 100644
--- a/src/northbridge/intel/gm45/raminit_rcomp_calibration.c
+++ b/src/northbridge/intel/gm45/raminit_rcomp_calibration.c
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <stdint.h>
 #include <delay.h>
diff --git a/src/northbridge/intel/gm45/raminit_read_write_training.c b/src/northbridge/intel/gm45/raminit_read_write_training.c
index 38a48d96d3..e8d719fca6 100644
--- a/src/northbridge/intel/gm45/raminit_read_write_training.c
+++ b/src/northbridge/intel/gm45/raminit_read_write_training.c
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <stdint.h>
 #include <device/mmio.h>
diff --git a/src/northbridge/intel/gm45/raminit_receive_enable_calibration.c b/src/northbridge/intel/gm45/raminit_receive_enable_calibration.c
index c6c092ba2a..6d95b3401b 100644
--- a/src/northbridge/intel/gm45/raminit_receive_enable_calibration.c
+++ b/src/northbridge/intel/gm45/raminit_receive_enable_calibration.c
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <stdint.h>
 #include <device/mmio.h>
diff --git a/src/northbridge/intel/gm45/romstage.c b/src/northbridge/intel/gm45/romstage.c
index 9bfb4e99bb..f7998c926a 100644
--- a/src/northbridge/intel/gm45/romstage.c
+++ b/src/northbridge/intel/gm45/romstage.c
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <cbmem.h>
 #include <romstage_handoff.h>
diff --git a/src/northbridge/intel/gm45/thermal.c b/src/northbridge/intel/gm45/thermal.c
index 73164946ad..ed1ec959bd 100644
--- a/src/northbridge/intel/gm45/thermal.c
+++ b/src/northbridge/intel/gm45/thermal.c
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <stdint.h>
 #include <stddef.h>
diff --git a/src/northbridge/intel/haswell/Kconfig b/src/northbridge/intel/haswell/Kconfig
index 972b3c996a..6501bc41a8 100644
--- a/src/northbridge/intel/haswell/Kconfig
+++ b/src/northbridge/intel/haswell/Kconfig
@@ -1,4 +1,3 @@
-# This file is part of the coreboot project.
 # SPDX-License-Identifier: GPL-2.0-only
 
 config NORTHBRIDGE_INTEL_HASWELL
diff --git a/src/northbridge/intel/haswell/Makefile.inc b/src/northbridge/intel/haswell/Makefile.inc
index e15a09f6a5..6eb6978310 100644
--- a/src/northbridge/intel/haswell/Makefile.inc
+++ b/src/northbridge/intel/haswell/Makefile.inc
@@ -1,5 +1,4 @@
 #
-# This file is part of the coreboot project.
 #
 #
 # SPDX-License-Identifier: GPL-2.0-only
diff --git a/src/northbridge/intel/haswell/acpi.c b/src/northbridge/intel/haswell/acpi.c
index a66847d6a9..1df66bc4d1 100644
--- a/src/northbridge/intel/haswell/acpi.c
+++ b/src/northbridge/intel/haswell/acpi.c
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <types.h>
 #include <console/console.h>
diff --git a/src/northbridge/intel/haswell/acpi/haswell.asl b/src/northbridge/intel/haswell/acpi/haswell.asl
index 27329a435b..4a9debfd3e 100644
--- a/src/northbridge/intel/haswell/acpi/haswell.asl
+++ b/src/northbridge/intel/haswell/acpi/haswell.asl
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include "../haswell.h"
 #include "hostbridge.asl"
diff --git a/src/northbridge/intel/haswell/acpi/hostbridge.asl b/src/northbridge/intel/haswell/acpi/hostbridge.asl
index 8c155b7a86..d8e35d337e 100644
--- a/src/northbridge/intel/haswell/acpi/hostbridge.asl
+++ b/src/northbridge/intel/haswell/acpi/hostbridge.asl
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 
 Name(_HID,EISAID("PNP0A08"))	// PCIe
diff --git a/src/northbridge/intel/haswell/acpi/peg.asl b/src/northbridge/intel/haswell/acpi/peg.asl
index 894978dff3..8dac128b8a 100644
--- a/src/northbridge/intel/haswell/acpi/peg.asl
+++ b/src/northbridge/intel/haswell/acpi/peg.asl
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 Device (PEGP)
 {
diff --git a/src/northbridge/intel/haswell/bootblock.c b/src/northbridge/intel/haswell/bootblock.c
index b6cfd0b65d..41f18be337 100644
--- a/src/northbridge/intel/haswell/bootblock.c
+++ b/src/northbridge/intel/haswell/bootblock.c
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <arch/bootblock.h>
 #include <device/pci_ops.h>
diff --git a/src/northbridge/intel/haswell/chip.h b/src/northbridge/intel/haswell/chip.h
index 678afb6831..593144d1d0 100644
--- a/src/northbridge/intel/haswell/chip.h
+++ b/src/northbridge/intel/haswell/chip.h
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #ifndef NORTHBRIDGE_INTEL_HASWELL_CHIP_H
 #define NORTHBRIDGE_INTEL_HASWELL_CHIP_H
diff --git a/src/northbridge/intel/haswell/early_init.c b/src/northbridge/intel/haswell/early_init.c
index 150cf27646..fb148fab1a 100644
--- a/src/northbridge/intel/haswell/early_init.c
+++ b/src/northbridge/intel/haswell/early_init.c
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <stdint.h>
 #include <console/console.h>
diff --git a/src/northbridge/intel/haswell/finalize.c b/src/northbridge/intel/haswell/finalize.c
index 2c69f0b2f5..93c89ce1eb 100644
--- a/src/northbridge/intel/haswell/finalize.c
+++ b/src/northbridge/intel/haswell/finalize.c
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <device/pci_ops.h>
 #include "haswell.h"
diff --git a/src/northbridge/intel/haswell/gma.c b/src/northbridge/intel/haswell/gma.c
index 4d70d1a001..0caa64fe11 100644
--- a/src/northbridge/intel/haswell/gma.c
+++ b/src/northbridge/intel/haswell/gma.c
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <commonlib/helpers.h>
 #include <arch/io.h>
diff --git a/src/northbridge/intel/haswell/haswell.h b/src/northbridge/intel/haswell/haswell.h
index 32ac7c3db4..bd441685b7 100644
--- a/src/northbridge/intel/haswell/haswell.h
+++ b/src/northbridge/intel/haswell/haswell.h
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #ifndef __NORTHBRIDGE_INTEL_HASWELL_HASWELL_H__
 #define __NORTHBRIDGE_INTEL_HASWELL_HASWELL_H__
diff --git a/src/northbridge/intel/haswell/mchbar_regs.h b/src/northbridge/intel/haswell/mchbar_regs.h
index fdd65daeb6..5fe15567e5 100644
--- a/src/northbridge/intel/haswell/mchbar_regs.h
+++ b/src/northbridge/intel/haswell/mchbar_regs.h
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #ifndef __HASWELL_MCHBAR_REGS_H__
 #define __HASWELL_MCHBAR_REGS_H__
diff --git a/src/northbridge/intel/haswell/memmap.c b/src/northbridge/intel/haswell/memmap.c
index fd7576c969..a86efeb788 100644
--- a/src/northbridge/intel/haswell/memmap.c
+++ b/src/northbridge/intel/haswell/memmap.c
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 /* Use simple device model for this file even in ramstage */
 #define __SIMPLE_DEVICE__
diff --git a/src/northbridge/intel/haswell/minihd.c b/src/northbridge/intel/haswell/minihd.c
index fffac52d9c..f8a16e231f 100644
--- a/src/northbridge/intel/haswell/minihd.c
+++ b/src/northbridge/intel/haswell/minihd.c
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <console/console.h>
 #include <device/device.h>
diff --git a/src/northbridge/intel/haswell/northbridge.c b/src/northbridge/intel/haswell/northbridge.c
index 099e7f0dc0..458439ef32 100644
--- a/src/northbridge/intel/haswell/northbridge.c
+++ b/src/northbridge/intel/haswell/northbridge.c
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <commonlib/helpers.h>
 #include <console/console.h>
diff --git a/src/northbridge/intel/haswell/pcie.c b/src/northbridge/intel/haswell/pcie.c
index 70f2c19401..74f11dde8c 100644
--- a/src/northbridge/intel/haswell/pcie.c
+++ b/src/northbridge/intel/haswell/pcie.c
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <console/console.h>
 #include <device/device.h>
diff --git a/src/northbridge/intel/haswell/raminit.c b/src/northbridge/intel/haswell/raminit.c
index ddb2f83314..8cd9e77aee 100644
--- a/src/northbridge/intel/haswell/raminit.c
+++ b/src/northbridge/intel/haswell/raminit.c
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <console/console.h>
 #include <console/usb.h>
diff --git a/src/northbridge/intel/haswell/raminit.h b/src/northbridge/intel/haswell/raminit.h
index 945ee154d2..562c24d5b6 100644
--- a/src/northbridge/intel/haswell/raminit.h
+++ b/src/northbridge/intel/haswell/raminit.h
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #ifndef RAMINIT_H
 #define RAMINIT_H
diff --git a/src/northbridge/intel/haswell/report_platform.c b/src/northbridge/intel/haswell/report_platform.c
index 2dc05950fd..8ea4175c36 100644
--- a/src/northbridge/intel/haswell/report_platform.c
+++ b/src/northbridge/intel/haswell/report_platform.c
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <console/console.h>
 #include <arch/cpu.h>
diff --git a/src/northbridge/intel/i440bx/Kconfig b/src/northbridge/intel/i440bx/Kconfig
index d8a81934fc..8a6783eba9 100644
--- a/src/northbridge/intel/i440bx/Kconfig
+++ b/src/northbridge/intel/i440bx/Kconfig
@@ -1,4 +1,3 @@
-# This file is part of the coreboot project.
 # SPDX-License-Identifier: GPL-2.0-only
 
 config NORTHBRIDGE_INTEL_I440BX
diff --git a/src/northbridge/intel/i440bx/Makefile.inc b/src/northbridge/intel/i440bx/Makefile.inc
index 6270811469..e57181d394 100644
--- a/src/northbridge/intel/i440bx/Makefile.inc
+++ b/src/northbridge/intel/i440bx/Makefile.inc
@@ -1,5 +1,4 @@
 ## SPDX-License-Identifier: GPL-2.0-or-later
-## This file is part of the coreboot project.
 
 ifeq ($(CONFIG_NORTHBRIDGE_INTEL_I440BX),y)
 
diff --git a/src/northbridge/intel/i440bx/acpi/sb_pci0_crs.asl b/src/northbridge/intel/i440bx/acpi/sb_pci0_crs.asl
index 856b3e83f2..fe66f39311 100644
--- a/src/northbridge/intel/i440bx/acpi/sb_pci0_crs.asl
+++ b/src/northbridge/intel/i440bx/acpi/sb_pci0_crs.asl
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 /* i440bx Northbridge */
 Device (NB)
diff --git a/src/northbridge/intel/i440bx/debug.c b/src/northbridge/intel/i440bx/debug.c
index 57df23fe44..b2b96176ca 100644
--- a/src/northbridge/intel/i440bx/debug.c
+++ b/src/northbridge/intel/i440bx/debug.c
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <console/console.h>
 #include <device/pci_ops.h>
diff --git a/src/northbridge/intel/i440bx/i440bx.h b/src/northbridge/intel/i440bx/i440bx.h
index 1b58003478..bbbd3f27b6 100644
--- a/src/northbridge/intel/i440bx/i440bx.h
+++ b/src/northbridge/intel/i440bx/i440bx.h
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-or-later */
-/* This file is part of the coreboot project. */
 
 #ifndef NORTHBRIDGE_INTEL_I440BX_I440BX_H
 #define NORTHBRIDGE_INTEL_I440BX_I440BX_H
diff --git a/src/northbridge/intel/i440bx/memmap.c b/src/northbridge/intel/i440bx/memmap.c
index 7231ccbf5d..b6d95268ad 100644
--- a/src/northbridge/intel/i440bx/memmap.c
+++ b/src/northbridge/intel/i440bx/memmap.c
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <arch/romstage.h>
 #include <device/pci_ops.h>
diff --git a/src/northbridge/intel/i440bx/northbridge.c b/src/northbridge/intel/i440bx/northbridge.c
index d0c93fd35d..aefd026bfc 100644
--- a/src/northbridge/intel/i440bx/northbridge.c
+++ b/src/northbridge/intel/i440bx/northbridge.c
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <console/console.h>
 #include <device/pci_ops.h>
diff --git a/src/northbridge/intel/i440bx/raminit.c b/src/northbridge/intel/i440bx/raminit.c
index d1e0f40ac1..19108136ab 100644
--- a/src/northbridge/intel/i440bx/raminit.c
+++ b/src/northbridge/intel/i440bx/raminit.c
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-or-later */
-/* This file is part of the coreboot project. */
 
 #include <spd.h>
 #include <delay.h>
diff --git a/src/northbridge/intel/i440bx/raminit.h b/src/northbridge/intel/i440bx/raminit.h
index e9099de2e9..87c799ee5f 100644
--- a/src/northbridge/intel/i440bx/raminit.h
+++ b/src/northbridge/intel/i440bx/raminit.h
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-or-later */
-/* This file is part of the coreboot project. */
 
 #ifndef RAMINIT_H
 #define RAMINIT_H
diff --git a/src/northbridge/intel/i440bx/romstage.c b/src/northbridge/intel/i440bx/romstage.c
index 199cf5cf0c..e734a291b2 100644
--- a/src/northbridge/intel/i440bx/romstage.c
+++ b/src/northbridge/intel/i440bx/romstage.c
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-or-later */
-/* This file is part of the coreboot project. */
 
 #include <arch/romstage.h>
 #include <cbmem.h>
diff --git a/src/northbridge/intel/i945/Kconfig b/src/northbridge/intel/i945/Kconfig
index 2c83be420f..754f36c996 100644
--- a/src/northbridge/intel/i945/Kconfig
+++ b/src/northbridge/intel/i945/Kconfig
@@ -1,4 +1,3 @@
-# This file is part of the coreboot project.
 # SPDX-License-Identifier: GPL-2.0-only
 
 config NORTHBRIDGE_INTEL_I945
diff --git a/src/northbridge/intel/i945/Makefile.inc b/src/northbridge/intel/i945/Makefile.inc
index 128596f86b..d1214308e0 100644
--- a/src/northbridge/intel/i945/Makefile.inc
+++ b/src/northbridge/intel/i945/Makefile.inc
@@ -1,5 +1,4 @@
 #
-# This file is part of the coreboot project.
 #
 #
 # SPDX-License-Identifier: GPL-2.0-only
diff --git a/src/northbridge/intel/i945/acpi.c b/src/northbridge/intel/i945/acpi.c
index 1c7eabcb57..75a6da5175 100644
--- a/src/northbridge/intel/i945/acpi.c
+++ b/src/northbridge/intel/i945/acpi.c
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <types.h>
 #include <acpi/acpi.h>
diff --git a/src/northbridge/intel/i945/acpi/hostbridge.asl b/src/northbridge/intel/i945/acpi/hostbridge.asl
index 33d9419291..5c202b9573 100644
--- a/src/northbridge/intel/i945/acpi/hostbridge.asl
+++ b/src/northbridge/intel/i945/acpi/hostbridge.asl
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <arch/ioapic.h>
 
diff --git a/src/northbridge/intel/i945/acpi/i945.asl b/src/northbridge/intel/i945/acpi/i945.asl
index a972939929..789225ca71 100644
--- a/src/northbridge/intel/i945/acpi/i945.asl
+++ b/src/northbridge/intel/i945/acpi/i945.asl
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include "hostbridge.asl"
 #include "../i945.h"
diff --git a/src/northbridge/intel/i945/acpi/igd.asl b/src/northbridge/intel/i945/acpi/igd.asl
index 94f45ef3da..5258c52672 100644
--- a/src/northbridge/intel/i945/acpi/igd.asl
+++ b/src/northbridge/intel/i945/acpi/igd.asl
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 Device (GFX0)
 {
diff --git a/src/northbridge/intel/i945/acpi/peg.asl b/src/northbridge/intel/i945/acpi/peg.asl
index 7dc67183b2..f85a22c08b 100644
--- a/src/northbridge/intel/i945/acpi/peg.asl
+++ b/src/northbridge/intel/i945/acpi/peg.asl
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 Device (PEGP)
 {
diff --git a/src/northbridge/intel/i945/bootblock.c b/src/northbridge/intel/i945/bootblock.c
index edc2170493..9a1444365a 100644
--- a/src/northbridge/intel/i945/bootblock.c
+++ b/src/northbridge/intel/i945/bootblock.c
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <arch/bootblock.h>
 #include <device/pci_ops.h>
diff --git a/src/northbridge/intel/i945/chip.h b/src/northbridge/intel/i945/chip.h
index a437028908..0de0e58f9f 100644
--- a/src/northbridge/intel/i945/chip.h
+++ b/src/northbridge/intel/i945/chip.h
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #ifndef NORTHBRIDGE_INTEL_I945_CHIP_H
 #define NORTHBRIDGE_INTEL_I945_CHIP_H
diff --git a/src/northbridge/intel/i945/debug.c b/src/northbridge/intel/i945/debug.c
index 181ef5171a..65da1aed68 100644
--- a/src/northbridge/intel/i945/debug.c
+++ b/src/northbridge/intel/i945/debug.c
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <spd.h>
 #include <device/pci_ops.h>
diff --git a/src/northbridge/intel/i945/early_init.c b/src/northbridge/intel/i945/early_init.c
index ced635a337..749eb3e9cd 100644
--- a/src/northbridge/intel/i945/early_init.c
+++ b/src/northbridge/intel/i945/early_init.c
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <arch/io.h>
 #include <cbmem.h>
diff --git a/src/northbridge/intel/i945/errata.c b/src/northbridge/intel/i945/errata.c
index ecdb5ea0c7..e8793c97db 100644
--- a/src/northbridge/intel/i945/errata.c
+++ b/src/northbridge/intel/i945/errata.c
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <stdint.h>
 #include "i945.h"
diff --git a/src/northbridge/intel/i945/gma.c b/src/northbridge/intel/i945/gma.c
index 3259ac4dad..dfdd2fa34e 100644
--- a/src/northbridge/intel/i945/gma.c
+++ b/src/northbridge/intel/i945/gma.c
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <console/console.h>
 #include <bootmode.h>
diff --git a/src/northbridge/intel/i945/i945.h b/src/northbridge/intel/i945/i945.h
index 56d4370e02..20558b31cb 100644
--- a/src/northbridge/intel/i945/i945.h
+++ b/src/northbridge/intel/i945/i945.h
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #ifndef NORTHBRIDGE_INTEL_I945_H
 #define NORTHBRIDGE_INTEL_I945_H
diff --git a/src/northbridge/intel/i945/memmap.c b/src/northbridge/intel/i945/memmap.c
index 0183ea2b3f..07aea98d17 100644
--- a/src/northbridge/intel/i945/memmap.c
+++ b/src/northbridge/intel/i945/memmap.c
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 // Use simple device model for this file even in ramstage
 #define __SIMPLE_DEVICE__
diff --git a/src/northbridge/intel/i945/northbridge.c b/src/northbridge/intel/i945/northbridge.c
index c080d0cbd5..f814c976b4 100644
--- a/src/northbridge/intel/i945/northbridge.c
+++ b/src/northbridge/intel/i945/northbridge.c
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <cbmem.h>
 #include <console/console.h>
diff --git a/src/northbridge/intel/i945/raminit.c b/src/northbridge/intel/i945/raminit.c
index f26fac6207..4e3509eb98 100644
--- a/src/northbridge/intel/i945/raminit.c
+++ b/src/northbridge/intel/i945/raminit.c
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <console/console.h>
 #include <delay.h>
diff --git a/src/northbridge/intel/i945/raminit.h b/src/northbridge/intel/i945/raminit.h
index 08943e795e..513984fc66 100644
--- a/src/northbridge/intel/i945/raminit.h
+++ b/src/northbridge/intel/i945/raminit.h
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #ifndef RAMINIT_H
 #define RAMINIT_H
diff --git a/src/northbridge/intel/i945/rcven.c b/src/northbridge/intel/i945/rcven.c
index 84814f7355..58fcfbcf60 100644
--- a/src/northbridge/intel/i945/rcven.c
+++ b/src/northbridge/intel/i945/rcven.c
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <console/console.h>
 #include <device/mmio.h>
diff --git a/src/northbridge/intel/i945/romstage.c b/src/northbridge/intel/i945/romstage.c
index 4649c10a45..2c9bdbb275 100644
--- a/src/northbridge/intel/i945/romstage.c
+++ b/src/northbridge/intel/i945/romstage.c
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <stdint.h>
 #include <cf9_reset.h>
diff --git a/src/northbridge/intel/ironlake/Kconfig b/src/northbridge/intel/ironlake/Kconfig
index 30370f89b0..fbad4be671 100644
--- a/src/northbridge/intel/ironlake/Kconfig
+++ b/src/northbridge/intel/ironlake/Kconfig
@@ -1,4 +1,3 @@
-# This file is part of the coreboot project.
 # SPDX-License-Identifier: GPL-2.0-only
 
 config NORTHBRIDGE_INTEL_IRONLAKE
diff --git a/src/northbridge/intel/ironlake/Makefile.inc b/src/northbridge/intel/ironlake/Makefile.inc
index 77081feb08..43dd124ae5 100644
--- a/src/northbridge/intel/ironlake/Makefile.inc
+++ b/src/northbridge/intel/ironlake/Makefile.inc
@@ -1,5 +1,4 @@
 #
-# This file is part of the coreboot project.
 #
 #
 # SPDX-License-Identifier: GPL-2.0-only
diff --git a/src/northbridge/intel/ironlake/acpi.c b/src/northbridge/intel/ironlake/acpi.c
index 9bb3130c77..7289e9219a 100644
--- a/src/northbridge/intel/ironlake/acpi.c
+++ b/src/northbridge/intel/ironlake/acpi.c
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #define __SIMPLE_DEVICE__
 
diff --git a/src/northbridge/intel/ironlake/acpi/hostbridge.asl b/src/northbridge/intel/ironlake/acpi/hostbridge.asl
index dfef304885..6a59fb546d 100644
--- a/src/northbridge/intel/ironlake/acpi/hostbridge.asl
+++ b/src/northbridge/intel/ironlake/acpi/hostbridge.asl
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 
 Name(_HID,EISAID("PNP0A08"))	// PCIe
diff --git a/src/northbridge/intel/ironlake/acpi/ironlake.asl b/src/northbridge/intel/ironlake/acpi/ironlake.asl
index 227e9a731e..3cf597daf7 100644
--- a/src/northbridge/intel/ironlake/acpi/ironlake.asl
+++ b/src/northbridge/intel/ironlake/acpi/ironlake.asl
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include "../ironlake.h"
 #include "hostbridge.asl"
diff --git a/src/northbridge/intel/ironlake/bootblock.c b/src/northbridge/intel/ironlake/bootblock.c
index f66c9ca8e0..d40b0b5d54 100644
--- a/src/northbridge/intel/ironlake/bootblock.c
+++ b/src/northbridge/intel/ironlake/bootblock.c
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <arch/bootblock.h>
 #include <device/pci_ops.h>
diff --git a/src/northbridge/intel/ironlake/chip.h b/src/northbridge/intel/ironlake/chip.h
index 087c28aea4..c437b724a4 100644
--- a/src/northbridge/intel/ironlake/chip.h
+++ b/src/northbridge/intel/ironlake/chip.h
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #ifndef NORTHBRIDGE_INTEL_IRONLAKE_CHIP_H
 #define NORTHBRIDGE_INTEL_IRONLAKE_CHIP_H
diff --git a/src/northbridge/intel/ironlake/early_init.c b/src/northbridge/intel/ironlake/early_init.c
index 7c522e005c..b6c5f0fe34 100644
--- a/src/northbridge/intel/ironlake/early_init.c
+++ b/src/northbridge/intel/ironlake/early_init.c
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <stdint.h>
 #include <console/console.h>
diff --git a/src/northbridge/intel/ironlake/finalize.c b/src/northbridge/intel/ironlake/finalize.c
index fe9753dbb6..6e0844b6dc 100644
--- a/src/northbridge/intel/ironlake/finalize.c
+++ b/src/northbridge/intel/ironlake/finalize.c
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include "ironlake.h"
 
diff --git a/src/northbridge/intel/ironlake/gma.c b/src/northbridge/intel/ironlake/gma.c
index 2521105920..1836d84253 100644
--- a/src/northbridge/intel/ironlake/gma.c
+++ b/src/northbridge/intel/ironlake/gma.c
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <arch/io.h>
 #include <device/mmio.h>
diff --git a/src/northbridge/intel/ironlake/ironlake.h b/src/northbridge/intel/ironlake/ironlake.h
index 4b4d736a0f..93d55a9dbf 100644
--- a/src/northbridge/intel/ironlake/ironlake.h
+++ b/src/northbridge/intel/ironlake/ironlake.h
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #ifndef __NORTHBRIDGE_INTEL_IRONLAKE_IRONLAKE_H__
 #define __NORTHBRIDGE_INTEL_IRONLAKE_IRONLAKE_H__
diff --git a/src/northbridge/intel/ironlake/memmap.c b/src/northbridge/intel/ironlake/memmap.c
index 136d57212b..406b9a90fe 100644
--- a/src/northbridge/intel/ironlake/memmap.c
+++ b/src/northbridge/intel/ironlake/memmap.c
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #define __SIMPLE_DEVICE__
 
diff --git a/src/northbridge/intel/ironlake/northbridge.c b/src/northbridge/intel/ironlake/northbridge.c
index 7384223c0d..07b8f53e61 100644
--- a/src/northbridge/intel/ironlake/northbridge.c
+++ b/src/northbridge/intel/ironlake/northbridge.c
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <console/console.h>
 #include <acpi/acpi.h>
diff --git a/src/northbridge/intel/ironlake/raminit.c b/src/northbridge/intel/ironlake/raminit.c
index 33b225659e..e85163fe72 100644
--- a/src/northbridge/intel/ironlake/raminit.c
+++ b/src/northbridge/intel/ironlake/raminit.c
@@ -1,4 +1,3 @@
-/* This file is part of the coreboot project. */
 /* SPDX-License-Identifier: GPL-2.0-or-later */
 
 #include <console/console.h>
diff --git a/src/northbridge/intel/ironlake/raminit.h b/src/northbridge/intel/ironlake/raminit.h
index 44e2299d66..5bb2f590a6 100644
--- a/src/northbridge/intel/ironlake/raminit.h
+++ b/src/northbridge/intel/ironlake/raminit.h
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #ifndef RAMINIT_H
 #define RAMINIT_H
diff --git a/src/northbridge/intel/ironlake/raminit_tables.c b/src/northbridge/intel/ironlake/raminit_tables.c
index 721e00b916..8dacc59ba0 100644
--- a/src/northbridge/intel/ironlake/raminit_tables.c
+++ b/src/northbridge/intel/ironlake/raminit_tables.c
@@ -1,4 +1,3 @@
-/* This file is part of the coreboot project. */
 /* SPDX-License-Identifier: GPL-2.0-or-later */
 
 #include "raminit_tables.h"
diff --git a/src/northbridge/intel/ironlake/raminit_tables.h b/src/northbridge/intel/ironlake/raminit_tables.h
index 822cb198f2..1aad8e3d80 100644
--- a/src/northbridge/intel/ironlake/raminit_tables.h
+++ b/src/northbridge/intel/ironlake/raminit_tables.h
@@ -1,4 +1,3 @@
-/* This file is part of the coreboot project. */
 /* SPDX-License-Identifier: GPL-2.0-or-later */
 
 #ifndef RAMINIT_TABLES_H
diff --git a/src/northbridge/intel/ironlake/romstage.c b/src/northbridge/intel/ironlake/romstage.c
index 749849e4f4..4a335d853c 100644
--- a/src/northbridge/intel/ironlake/romstage.c
+++ b/src/northbridge/intel/ironlake/romstage.c
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <stdint.h>
 #include <console/console.h>
diff --git a/src/northbridge/intel/ironlake/smi.c b/src/northbridge/intel/ironlake/smi.c
index e6219b512e..9ffcb995a3 100644
--- a/src/northbridge/intel/ironlake/smi.c
+++ b/src/northbridge/intel/ironlake/smi.c
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #define __SIMPLE_DEVICE__
 
diff --git a/src/northbridge/intel/pineview/Kconfig b/src/northbridge/intel/pineview/Kconfig
index 181846fdc1..a1b089459b 100644
--- a/src/northbridge/intel/pineview/Kconfig
+++ b/src/northbridge/intel/pineview/Kconfig
@@ -1,4 +1,3 @@
-# This file is part of the coreboot project.
 # SPDX-License-Identifier: GPL-2.0-only
 
 config NORTHBRIDGE_INTEL_PINEVIEW
diff --git a/src/northbridge/intel/pineview/Makefile.inc b/src/northbridge/intel/pineview/Makefile.inc
index 645f0182b1..bd7d58958a 100644
--- a/src/northbridge/intel/pineview/Makefile.inc
+++ b/src/northbridge/intel/pineview/Makefile.inc
@@ -1,5 +1,4 @@
 #
-# This file is part of the coreboot project.
 #
 #
 # SPDX-License-Identifier: GPL-2.0-only
diff --git a/src/northbridge/intel/pineview/acpi.c b/src/northbridge/intel/pineview/acpi.c
index cf91f1ea65..575814c2d5 100644
--- a/src/northbridge/intel/pineview/acpi.c
+++ b/src/northbridge/intel/pineview/acpi.c
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <acpi/acpigen.h>
 #include <acpi/acpi.h>
diff --git a/src/northbridge/intel/pineview/acpi/hostbridge.asl b/src/northbridge/intel/pineview/acpi/hostbridge.asl
index 05ed293dd3..434ed07176 100644
--- a/src/northbridge/intel/pineview/acpi/hostbridge.asl
+++ b/src/northbridge/intel/pineview/acpi/hostbridge.asl
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <arch/ioapic.h>
 
diff --git a/src/northbridge/intel/pineview/acpi/peg.asl b/src/northbridge/intel/pineview/acpi/peg.asl
index 7dc67183b2..f85a22c08b 100644
--- a/src/northbridge/intel/pineview/acpi/peg.asl
+++ b/src/northbridge/intel/pineview/acpi/peg.asl
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 Device (PEGP)
 {
diff --git a/src/northbridge/intel/pineview/acpi/pineview.asl b/src/northbridge/intel/pineview/acpi/pineview.asl
index ebb6eb9bdd..074e9007d7 100644
--- a/src/northbridge/intel/pineview/acpi/pineview.asl
+++ b/src/northbridge/intel/pineview/acpi/pineview.asl
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include "hostbridge.asl"
 #include "../iomap.h"
diff --git a/src/northbridge/intel/pineview/bootblock.c b/src/northbridge/intel/pineview/bootblock.c
index d8d19380d8..7fb506e751 100644
--- a/src/northbridge/intel/pineview/bootblock.c
+++ b/src/northbridge/intel/pineview/bootblock.c
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <arch/bootblock.h>
 #include <device/pci_ops.h>
diff --git a/src/northbridge/intel/pineview/chip.h b/src/northbridge/intel/pineview/chip.h
index db3aa19707..6d67969e78 100644
--- a/src/northbridge/intel/pineview/chip.h
+++ b/src/northbridge/intel/pineview/chip.h
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #ifndef NORTHBRIDGE_INTEL_PINEVIEW_CHIP_H
 #define NORTHBRIDGE_INTEL_PINEVIEW_CHIP_H
diff --git a/src/northbridge/intel/pineview/early_init.c b/src/northbridge/intel/pineview/early_init.c
index 9c0b46e2b6..5b9ef4d3fd 100644
--- a/src/northbridge/intel/pineview/early_init.c
+++ b/src/northbridge/intel/pineview/early_init.c
@@ -1,4 +1,3 @@
-/* This file is part of the coreboot project. */
 /* SPDX-License-Identifier: GPL-2.0-or-later */
 
 #include <console/console.h>
diff --git a/src/northbridge/intel/pineview/gma.c b/src/northbridge/intel/pineview/gma.c
index 7d6b51d93a..b0ecfe1d64 100644
--- a/src/northbridge/intel/pineview/gma.c
+++ b/src/northbridge/intel/pineview/gma.c
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <arch/io.h>
 #include <device/mmio.h>
diff --git a/src/northbridge/intel/pineview/iomap.h b/src/northbridge/intel/pineview/iomap.h
index e7472b43a9..4560da0eda 100644
--- a/src/northbridge/intel/pineview/iomap.h
+++ b/src/northbridge/intel/pineview/iomap.h
@@ -1,4 +1,3 @@
-/* This file is part of the coreboot project. */
 /* SPDX-License-Identifier: GPL-2.0-or-later */
 
 #ifndef PINEVIEW_IOMAP_H
diff --git a/src/northbridge/intel/pineview/mchbar_regs.h b/src/northbridge/intel/pineview/mchbar_regs.h
index f331f1d2f2..e9cd7ce46a 100644
--- a/src/northbridge/intel/pineview/mchbar_regs.h
+++ b/src/northbridge/intel/pineview/mchbar_regs.h
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #ifndef __PINEVIEW_MCHBAR_REGS_H__
 #define __PINEVIEW_MCHBAR_REGS_H__
diff --git a/src/northbridge/intel/pineview/memmap.c b/src/northbridge/intel/pineview/memmap.c
index 4717b76a55..ad89aef04d 100644
--- a/src/northbridge/intel/pineview/memmap.c
+++ b/src/northbridge/intel/pineview/memmap.c
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #define __SIMPLE_DEVICE__
 
diff --git a/src/northbridge/intel/pineview/northbridge.c b/src/northbridge/intel/pineview/northbridge.c
index af4bfb8ef5..83bc60eece 100644
--- a/src/northbridge/intel/pineview/northbridge.c
+++ b/src/northbridge/intel/pineview/northbridge.c
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <cbmem.h>
 #include <console/console.h>
diff --git a/src/northbridge/intel/pineview/pineview.h b/src/northbridge/intel/pineview/pineview.h
index df4232a759..55d098b9d4 100644
--- a/src/northbridge/intel/pineview/pineview.h
+++ b/src/northbridge/intel/pineview/pineview.h
@@ -1,4 +1,3 @@
-/* This file is part of the coreboot project. */
 /* SPDX-License-Identifier: GPL-2.0-or-later */
 
 #ifndef NORTHBRIDGE_INTEL_PINEVIEW_H
diff --git a/src/northbridge/intel/pineview/raminit.c b/src/northbridge/intel/pineview/raminit.c
index 1e1170d4f3..25c9ba2544 100644
--- a/src/northbridge/intel/pineview/raminit.c
+++ b/src/northbridge/intel/pineview/raminit.c
@@ -1,4 +1,3 @@
-/* This file is part of the coreboot project. */
 /* SPDX-License-Identifier: GPL-2.0-or-later */
 
 #include <cf9_reset.h>
diff --git a/src/northbridge/intel/pineview/raminit.h b/src/northbridge/intel/pineview/raminit.h
index 3d52117913..22e65cd648 100644
--- a/src/northbridge/intel/pineview/raminit.h
+++ b/src/northbridge/intel/pineview/raminit.h
@@ -1,4 +1,3 @@
-/* This file is part of the coreboot project. */
 /* SPDX-License-Identifier: GPL-2.0-or-later */
 
 #ifndef PINEVIEW_RAMINIT_H
diff --git a/src/northbridge/intel/pineview/romstage.c b/src/northbridge/intel/pineview/romstage.c
index eddfc668e9..22ed95252f 100644
--- a/src/northbridge/intel/pineview/romstage.c
+++ b/src/northbridge/intel/pineview/romstage.c
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <timestamp.h>
 #include <console/console.h>
diff --git a/src/northbridge/intel/sandybridge/Kconfig b/src/northbridge/intel/sandybridge/Kconfig
index 6b7520f27d..ef6dc3daf5 100644
--- a/src/northbridge/intel/sandybridge/Kconfig
+++ b/src/northbridge/intel/sandybridge/Kconfig
@@ -1,5 +1,4 @@
 ## SPDX-License-Identifier: GPL-2.0-only
-## This file is part of the coreboot project.
 
 config NORTHBRIDGE_INTEL_SANDYBRIDGE
 	bool
diff --git a/src/northbridge/intel/sandybridge/Makefile.inc b/src/northbridge/intel/sandybridge/Makefile.inc
index de52242612..a5b2e5efb6 100644
--- a/src/northbridge/intel/sandybridge/Makefile.inc
+++ b/src/northbridge/intel/sandybridge/Makefile.inc
@@ -1,5 +1,4 @@
 ## SPDX-License-Identifier: GPL-2.0-only
-## This file is part of the coreboot project.
 
 ifeq ($(CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE),y)
 
diff --git a/src/northbridge/intel/sandybridge/acpi.c b/src/northbridge/intel/sandybridge/acpi.c
index 3ae44b8b36..2cfb9ee8c3 100644
--- a/src/northbridge/intel/sandybridge/acpi.c
+++ b/src/northbridge/intel/sandybridge/acpi.c
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <types.h>
 #include <console/console.h>
diff --git a/src/northbridge/intel/sandybridge/acpi/hostbridge.asl b/src/northbridge/intel/sandybridge/acpi/hostbridge.asl
index 26df8f2de1..c3561f85b6 100644
--- a/src/northbridge/intel/sandybridge/acpi/hostbridge.asl
+++ b/src/northbridge/intel/sandybridge/acpi/hostbridge.asl
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 Name(_HID,EISAID("PNP0A08"))	// PCIe
 Name(_CID,EISAID("PNP0A03"))	// PCI
diff --git a/src/northbridge/intel/sandybridge/acpi/peg.asl b/src/northbridge/intel/sandybridge/acpi/peg.asl
index e48cbea3b8..65b71d1cc3 100644
--- a/src/northbridge/intel/sandybridge/acpi/peg.asl
+++ b/src/northbridge/intel/sandybridge/acpi/peg.asl
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 Device (PEGP)
 {
diff --git a/src/northbridge/intel/sandybridge/acpi/sandybridge.asl b/src/northbridge/intel/sandybridge/acpi/sandybridge.asl
index 2dd5c00f31..728d8e3ff5 100644
--- a/src/northbridge/intel/sandybridge/acpi/sandybridge.asl
+++ b/src/northbridge/intel/sandybridge/acpi/sandybridge.asl
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include "hostbridge.asl"
 #include "peg.asl"
diff --git a/src/northbridge/intel/sandybridge/bootblock.c b/src/northbridge/intel/sandybridge/bootblock.c
index 39564cf970..37ef02531e 100644
--- a/src/northbridge/intel/sandybridge/bootblock.c
+++ b/src/northbridge/intel/sandybridge/bootblock.c
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <arch/bootblock.h>
 #include <device/pci_ops.h>
diff --git a/src/northbridge/intel/sandybridge/chip.h b/src/northbridge/intel/sandybridge/chip.h
index 2e97f31406..8f388ec188 100644
--- a/src/northbridge/intel/sandybridge/chip.h
+++ b/src/northbridge/intel/sandybridge/chip.h
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #ifndef NORTHBRIDGE_INTEL_SANDYBRIDGE_CHIP_H
 #define NORTHBRIDGE_INTEL_SANDYBRIDGE_CHIP_H
diff --git a/src/northbridge/intel/sandybridge/common.c b/src/northbridge/intel/sandybridge/common.c
index 0533d1ddfa..d64a740b04 100644
--- a/src/northbridge/intel/sandybridge/common.c
+++ b/src/northbridge/intel/sandybridge/common.c
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <types.h>
 #include <console/console.h>
diff --git a/src/northbridge/intel/sandybridge/early_dmi.c b/src/northbridge/intel/sandybridge/early_dmi.c
index 89bed7403d..287c4414d2 100644
--- a/src/northbridge/intel/sandybridge/early_dmi.c
+++ b/src/northbridge/intel/sandybridge/early_dmi.c
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <console/console.h>
 #include <northbridge/intel/sandybridge/sandybridge.h>
diff --git a/src/northbridge/intel/sandybridge/early_init.c b/src/northbridge/intel/sandybridge/early_init.c
index d63ba1e311..59f05047a3 100644
--- a/src/northbridge/intel/sandybridge/early_init.c
+++ b/src/northbridge/intel/sandybridge/early_init.c
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <console/console.h>
 #include <device/mmio.h>
diff --git a/src/northbridge/intel/sandybridge/finalize.c b/src/northbridge/intel/sandybridge/finalize.c
index e3e1964349..26c53060c9 100644
--- a/src/northbridge/intel/sandybridge/finalize.c
+++ b/src/northbridge/intel/sandybridge/finalize.c
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <device/pci_ops.h>
 #include "sandybridge.h"
diff --git a/src/northbridge/intel/sandybridge/gma.c b/src/northbridge/intel/sandybridge/gma.c
index bb099f0663..9ff68d1e7d 100644
--- a/src/northbridge/intel/sandybridge/gma.c
+++ b/src/northbridge/intel/sandybridge/gma.c
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <arch/io.h>
 #include <device/mmio.h>
diff --git a/src/northbridge/intel/sandybridge/gma.h b/src/northbridge/intel/sandybridge/gma.h
index 3eaa4845a1..c15ad5370f 100644
--- a/src/northbridge/intel/sandybridge/gma.h
+++ b/src/northbridge/intel/sandybridge/gma.h
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #ifndef NORTHBRIDGE_INTEL_SANDYBRIDGE_GMA_H
 #define NORTHBRIDGE_INTEL_SANDYBRIDGE_GMA_H
diff --git a/src/northbridge/intel/sandybridge/mchbar_regs.h b/src/northbridge/intel/sandybridge/mchbar_regs.h
index 5f46e706a8..74377b247b 100644
--- a/src/northbridge/intel/sandybridge/mchbar_regs.h
+++ b/src/northbridge/intel/sandybridge/mchbar_regs.h
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #ifndef __SANDYBRIDGE_MCHBAR_REGS_H__
 #define __SANDYBRIDGE_MCHBAR_REGS_H__
diff --git a/src/northbridge/intel/sandybridge/memmap.c b/src/northbridge/intel/sandybridge/memmap.c
index 52a83e74c0..8da4ec9eeb 100644
--- a/src/northbridge/intel/sandybridge/memmap.c
+++ b/src/northbridge/intel/sandybridge/memmap.c
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #define __SIMPLE_DEVICE__
 
diff --git a/src/northbridge/intel/sandybridge/northbridge.c b/src/northbridge/intel/sandybridge/northbridge.c
index e947bc5613..b3772189b2 100644
--- a/src/northbridge/intel/sandybridge/northbridge.c
+++ b/src/northbridge/intel/sandybridge/northbridge.c
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <console/console.h>
 #include <acpi/acpi.h>
diff --git a/src/northbridge/intel/sandybridge/pcie.c b/src/northbridge/intel/sandybridge/pcie.c
index 0c3912c0bf..f2b75d6ca6 100644
--- a/src/northbridge/intel/sandybridge/pcie.c
+++ b/src/northbridge/intel/sandybridge/pcie.c
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <console/console.h>
 #include <device/device.h>
diff --git a/src/northbridge/intel/sandybridge/raminit.c b/src/northbridge/intel/sandybridge/raminit.c
index 6c8145d13d..a2b26ae1bf 100644
--- a/src/northbridge/intel/sandybridge/raminit.c
+++ b/src/northbridge/intel/sandybridge/raminit.c
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <console/console.h>
 #include <commonlib/region.h>
diff --git a/src/northbridge/intel/sandybridge/raminit.h b/src/northbridge/intel/sandybridge/raminit.h
index efd87d0099..dc0134312f 100644
--- a/src/northbridge/intel/sandybridge/raminit.h
+++ b/src/northbridge/intel/sandybridge/raminit.h
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #ifndef RAMINIT_H
 #define RAMINIT_H
diff --git a/src/northbridge/intel/sandybridge/raminit_common.c b/src/northbridge/intel/sandybridge/raminit_common.c
index 087ba2b550..19b72cb18e 100644
--- a/src/northbridge/intel/sandybridge/raminit_common.c
+++ b/src/northbridge/intel/sandybridge/raminit_common.c
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <commonlib/helpers.h>
 #include <console/console.h>
diff --git a/src/northbridge/intel/sandybridge/raminit_common.h b/src/northbridge/intel/sandybridge/raminit_common.h
index 314c67de80..4c97bfe6d4 100644
--- a/src/northbridge/intel/sandybridge/raminit_common.h
+++ b/src/northbridge/intel/sandybridge/raminit_common.h
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #ifndef RAMINIT_COMMON_H
 #define RAMINIT_COMMON_H
diff --git a/src/northbridge/intel/sandybridge/raminit_mrc.c b/src/northbridge/intel/sandybridge/raminit_mrc.c
index 2178c9d2ff..43858f53bb 100644
--- a/src/northbridge/intel/sandybridge/raminit_mrc.c
+++ b/src/northbridge/intel/sandybridge/raminit_mrc.c
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <console/console.h>
 #include <console/usb.h>
diff --git a/src/northbridge/intel/sandybridge/raminit_native.c b/src/northbridge/intel/sandybridge/raminit_native.c
index 832391f72e..e95f154c02 100644
--- a/src/northbridge/intel/sandybridge/raminit_native.c
+++ b/src/northbridge/intel/sandybridge/raminit_native.c
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <commonlib/clamp.h>
 #include <console/console.h>
diff --git a/src/northbridge/intel/sandybridge/raminit_native.h b/src/northbridge/intel/sandybridge/raminit_native.h
index 21ba99b49d..1bba1809c6 100644
--- a/src/northbridge/intel/sandybridge/raminit_native.h
+++ b/src/northbridge/intel/sandybridge/raminit_native.h
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #ifndef RAMINIT_NATIVE_H
 #define RAMINIT_NATIVE_H
diff --git a/src/northbridge/intel/sandybridge/raminit_shared.c b/src/northbridge/intel/sandybridge/raminit_shared.c
index ab91b05a10..426035d810 100644
--- a/src/northbridge/intel/sandybridge/raminit_shared.c
+++ b/src/northbridge/intel/sandybridge/raminit_shared.c
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <console/console.h>
 #include <device/mmio.h>
diff --git a/src/northbridge/intel/sandybridge/raminit_tables.c b/src/northbridge/intel/sandybridge/raminit_tables.c
index 67dbd2ba14..bd0d11778a 100644
--- a/src/northbridge/intel/sandybridge/raminit_tables.c
+++ b/src/northbridge/intel/sandybridge/raminit_tables.c
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include "raminit_tables.h"
 
diff --git a/src/northbridge/intel/sandybridge/raminit_tables.h b/src/northbridge/intel/sandybridge/raminit_tables.h
index e5cf589b70..99077a4528 100644
--- a/src/northbridge/intel/sandybridge/raminit_tables.h
+++ b/src/northbridge/intel/sandybridge/raminit_tables.h
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #ifndef RAMINIT_TABLES_H
 #define RAMINIT_TABLES_H
diff --git a/src/northbridge/intel/sandybridge/romstage.c b/src/northbridge/intel/sandybridge/romstage.c
index 8745986416..dce024b033 100644
--- a/src/northbridge/intel/sandybridge/romstage.c
+++ b/src/northbridge/intel/sandybridge/romstage.c
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <stdint.h>
 #include <console/console.h>
diff --git a/src/northbridge/intel/sandybridge/sandybridge.h b/src/northbridge/intel/sandybridge/sandybridge.h
index 0b29e1705e..1652b095cf 100644
--- a/src/northbridge/intel/sandybridge/sandybridge.h
+++ b/src/northbridge/intel/sandybridge/sandybridge.h
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #ifndef __NORTHBRIDGE_INTEL_SANDYBRIDGE_SANDYBRIDGE_H__
 #define __NORTHBRIDGE_INTEL_SANDYBRIDGE_SANDYBRIDGE_H__
diff --git a/src/northbridge/intel/x4x/Kconfig b/src/northbridge/intel/x4x/Kconfig
index 82fce8f61e..9ac9b87933 100644
--- a/src/northbridge/intel/x4x/Kconfig
+++ b/src/northbridge/intel/x4x/Kconfig
@@ -1,4 +1,3 @@
-# This file is part of the coreboot project.
 # SPDX-License-Identifier: GPL-2.0-only
 
 config NORTHBRIDGE_INTEL_X4X
diff --git a/src/northbridge/intel/x4x/Makefile.inc b/src/northbridge/intel/x4x/Makefile.inc
index 508df6df0d..e96510bc52 100644
--- a/src/northbridge/intel/x4x/Makefile.inc
+++ b/src/northbridge/intel/x4x/Makefile.inc
@@ -1,5 +1,4 @@
 #
-# This file is part of the coreboot project.
 #
 #
 # SPDX-License-Identifier: GPL-2.0-only
diff --git a/src/northbridge/intel/x4x/acpi.c b/src/northbridge/intel/x4x/acpi.c
index 67fc93334b..57173fd156 100644
--- a/src/northbridge/intel/x4x/acpi.c
+++ b/src/northbridge/intel/x4x/acpi.c
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <types.h>
 #include <console/console.h>
diff --git a/src/northbridge/intel/x4x/acpi/hostbridge.asl b/src/northbridge/intel/x4x/acpi/hostbridge.asl
index 0126aaf0a7..9a5cbd9618 100644
--- a/src/northbridge/intel/x4x/acpi/hostbridge.asl
+++ b/src/northbridge/intel/x4x/acpi/hostbridge.asl
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <arch/ioapic.h>
 
diff --git a/src/northbridge/intel/x4x/acpi/peg.asl b/src/northbridge/intel/x4x/acpi/peg.asl
index 07baf85ad6..46731289d8 100644
--- a/src/northbridge/intel/x4x/acpi/peg.asl
+++ b/src/northbridge/intel/x4x/acpi/peg.asl
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 Device (PEGP)
 {
diff --git a/src/northbridge/intel/x4x/acpi/x4x.asl b/src/northbridge/intel/x4x/acpi/x4x.asl
index e9761678ef..51deea8f67 100644
--- a/src/northbridge/intel/x4x/acpi/x4x.asl
+++ b/src/northbridge/intel/x4x/acpi/x4x.asl
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include "hostbridge.asl"
 #include "../iomap.h"
diff --git a/src/northbridge/intel/x4x/bootblock.c b/src/northbridge/intel/x4x/bootblock.c
index 61d987b338..5db93824ce 100644
--- a/src/northbridge/intel/x4x/bootblock.c
+++ b/src/northbridge/intel/x4x/bootblock.c
@@ -1,4 +1,3 @@
-/* This file is part of the coreboot project. */
 /* SPDX-License-Identifier: GPL-2.0-or-later */
 
 #include <arch/bootblock.h>
diff --git a/src/northbridge/intel/x4x/chip.h b/src/northbridge/intel/x4x/chip.h
index 7d40d209a1..4cfb83e831 100644
--- a/src/northbridge/intel/x4x/chip.h
+++ b/src/northbridge/intel/x4x/chip.h
@@ -1,4 +1,3 @@
-/* This file is part of the coreboot project. */
 /* SPDX-License-Identifier: GPL-2.0-or-later */
 
 #ifndef NORTHBRIDGE_INTEL_X4X_CHIP_H
diff --git a/src/northbridge/intel/x4x/dq_dqs.c b/src/northbridge/intel/x4x/dq_dqs.c
index 82f4acd4b6..7df259172a 100644
--- a/src/northbridge/intel/x4x/dq_dqs.c
+++ b/src/northbridge/intel/x4x/dq_dqs.c
@@ -1,4 +1,3 @@
-/* This file is part of the coreboot project. */
 /* SPDX-License-Identifier: GPL-2.0-or-later */
 
 #include <device/mmio.h>
diff --git a/src/northbridge/intel/x4x/early_init.c b/src/northbridge/intel/x4x/early_init.c
index 4cfc37ae6c..87c684ced6 100644
--- a/src/northbridge/intel/x4x/early_init.c
+++ b/src/northbridge/intel/x4x/early_init.c
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <stdint.h>
 #include <device/pci_ops.h>
diff --git a/src/northbridge/intel/x4x/gma.c b/src/northbridge/intel/x4x/gma.c
index 03d72649aa..0067d71bbc 100644
--- a/src/northbridge/intel/x4x/gma.c
+++ b/src/northbridge/intel/x4x/gma.c
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <console/console.h>
 #include <device/device.h>
diff --git a/src/northbridge/intel/x4x/iomap.h b/src/northbridge/intel/x4x/iomap.h
index 06eb7462c3..d016cf74af 100644
--- a/src/northbridge/intel/x4x/iomap.h
+++ b/src/northbridge/intel/x4x/iomap.h
@@ -1,4 +1,3 @@
-/* This file is part of the coreboot project. */
 /* SPDX-License-Identifier: GPL-2.0-or-later */
 
 #ifndef X4X_IOMAP_H
diff --git a/src/northbridge/intel/x4x/memmap.c b/src/northbridge/intel/x4x/memmap.c
index 233f5ecbd7..ee1ec5e2be 100644
--- a/src/northbridge/intel/x4x/memmap.c
+++ b/src/northbridge/intel/x4x/memmap.c
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #define __SIMPLE_DEVICE__
 
diff --git a/src/northbridge/intel/x4x/northbridge.c b/src/northbridge/intel/x4x/northbridge.c
index 8aab1f63bd..45b6ce3248 100644
--- a/src/northbridge/intel/x4x/northbridge.c
+++ b/src/northbridge/intel/x4x/northbridge.c
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <cbmem.h>
 #include <console/console.h>
diff --git a/src/northbridge/intel/x4x/raminit.c b/src/northbridge/intel/x4x/raminit.c
index 90d8a449bf..330ce9ee71 100644
--- a/src/northbridge/intel/x4x/raminit.c
+++ b/src/northbridge/intel/x4x/raminit.c
@@ -1,4 +1,3 @@
-/* This file is part of the coreboot project. */
 /* SPDX-License-Identifier: GPL-2.0-or-later */
 
 #include <device/pci_ops.h>
diff --git a/src/northbridge/intel/x4x/raminit_ddr23.c b/src/northbridge/intel/x4x/raminit_ddr23.c
index e0ce3404df..ef1094f92c 100644
--- a/src/northbridge/intel/x4x/raminit_ddr23.c
+++ b/src/northbridge/intel/x4x/raminit_ddr23.c
@@ -1,4 +1,3 @@
-/* This file is part of the coreboot project. */
 /* SPDX-License-Identifier: GPL-2.0-or-later */
 
 #include <assert.h>
diff --git a/src/northbridge/intel/x4x/raminit_tables.c b/src/northbridge/intel/x4x/raminit_tables.c
index 1f8e97fba9..3cd4879787 100644
--- a/src/northbridge/intel/x4x/raminit_tables.c
+++ b/src/northbridge/intel/x4x/raminit_tables.c
@@ -1,4 +1,3 @@
-/* This file is part of the coreboot project. */
 /* SPDX-License-Identifier: GPL-2.0-or-later */
 
 #include <stdint.h>
diff --git a/src/northbridge/intel/x4x/rcven.c b/src/northbridge/intel/x4x/rcven.c
index 3b59df2038..332d89c526 100644
--- a/src/northbridge/intel/x4x/rcven.c
+++ b/src/northbridge/intel/x4x/rcven.c
@@ -1,4 +1,3 @@
-/* This file is part of the coreboot project. */
 /* SPDX-License-Identifier: GPL-2.0-or-later */
 
 #include <device/mmio.h>
diff --git a/src/northbridge/intel/x4x/romstage.c b/src/northbridge/intel/x4x/romstage.c
index aebec25bdb..5f47359c09 100644
--- a/src/northbridge/intel/x4x/romstage.c
+++ b/src/northbridge/intel/x4x/romstage.c
@@ -1,4 +1,3 @@
-/* This file is part of the coreboot project. */
 /* SPDX-License-Identifier: GPL-2.0-or-later */
 
 #include <device/pci_ops.h>
diff --git a/src/northbridge/intel/x4x/x4x.h b/src/northbridge/intel/x4x/x4x.h
index 23db61bf76..5418b4141d 100644
--- a/src/northbridge/intel/x4x/x4x.h
+++ b/src/northbridge/intel/x4x/x4x.h
@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #ifndef __NORTHBRIDGE_INTEL_X4X_H__
 #define __NORTHBRIDGE_INTEL_X4X_H__
-- 
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