From 603963e1ba4147ef31a72b94304708ab416e3b6a Mon Sep 17 00:00:00 2001 From: Elyes HAOUAS Date: Fri, 28 Sep 2018 09:06:43 +0200 Subject: src: Replace MSR addresses with macros Change-Id: I849dd406f5ccc733d4957eaf1c774745782f531a Signed-off-by: Elyes HAOUAS Reviewed-on: https://review.coreboot.org/28784 Tested-by: build bot (Jenkins) Reviewed-by: Werner Zeh --- src/northbridge/intel/haswell/report_platform.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/northbridge/intel') diff --git a/src/northbridge/intel/haswell/report_platform.c b/src/northbridge/intel/haswell/report_platform.c index 5b738440f5..04ef3d5ec9 100644 --- a/src/northbridge/intel/haswell/report_platform.c +++ b/src/northbridge/intel/haswell/report_platform.c @@ -50,9 +50,9 @@ static void report_cpu_info(void) microcode_ver.lo = 0; microcode_ver.hi = 0; - wrmsr(0x8B, microcode_ver); + wrmsr(IA32_BIOS_SIGN_ID, microcode_ver); cpuidr = cpuid(1); - microcode_ver = rdmsr(0x8b); + microcode_ver = rdmsr(IA32_BIOS_SIGN_ID); printk(BIOS_DEBUG, "CPU id(%x) ucode:%08x %s\n", cpuidr.eax, microcode_ver.hi, cpu_name); aes = (cpuidr.ecx & (1 << 25)) ? 1 : 0; txt = (cpuidr.ecx & (1 << 6)) ? 1 : 0; -- cgit v1.2.3