From 5e29f00c5598942b3f57813f90fbbb73f82e969b Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Wed, 18 Jul 2012 14:38:54 +0300 Subject: Intel and GFXUMA: drop redundant use of lb_add_memory_range() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Use of uma_resource() in northbridge code created a memory resource marked as reserved. Such resources are removed from system memory in write_coreboot_table(). Change-Id: I14bfd560140d8d30ec156562f23072bfae747bde Signed-off-by: Kyösti Mälkki Reviewed-on: http://review.coreboot.org/1238 Tested-by: build bot (Jenkins) Reviewed-by: Anton Kochkov --- src/northbridge/intel/i82810/northbridge.c | 9 --------- src/northbridge/intel/i82830/northbridge.c | 9 --------- src/northbridge/intel/sandybridge/northbridge.c | 5 ----- 3 files changed, 23 deletions(-) (limited to 'src/northbridge/intel') diff --git a/src/northbridge/intel/i82810/northbridge.c b/src/northbridge/intel/i82810/northbridge.c index f6d14e0bd2..c738de7916 100644 --- a/src/northbridge/intel/i82810/northbridge.c +++ b/src/northbridge/intel/i82810/northbridge.c @@ -62,15 +62,6 @@ static const struct pci_driver i810e_northbridge_driver __pci_driver = { .device = 0x7124, }; -int add_northbridge_resources(struct lb_memory *mem) -{ - printk(BIOS_DEBUG, "Adding IGD UMA memory area\n"); - lb_add_memory_range(mem, LB_MEM_RESERVED, - uma_memory_base, uma_memory_size); - - return 0; -} - /* Table which returns the RAM size in MB when fed the DRP[7:4] or [3:0] value. * Note that 2 is a value which the DRP should never be programmed to. * Some size values appear twice, due to single-sided vs dual-sided banks. diff --git a/src/northbridge/intel/i82830/northbridge.c b/src/northbridge/intel/i82830/northbridge.c index 649a203aca..4951c4f617 100644 --- a/src/northbridge/intel/i82830/northbridge.c +++ b/src/northbridge/intel/i82830/northbridge.c @@ -52,15 +52,6 @@ static const struct pci_driver northbridge_driver __pci_driver = { .device = 0x3575, }; -int add_northbridge_resources(struct lb_memory *mem) -{ - printk(BIOS_DEBUG, "Adding IGD UMA memory area\n"); - lb_add_memory_range(mem, LB_MEM_RESERVED, - uma_memory_base, uma_memory_size); - - return 0; -} - #if CONFIG_WRITE_HIGH_TABLES #include #endif diff --git a/src/northbridge/intel/sandybridge/northbridge.c b/src/northbridge/intel/sandybridge/northbridge.c index 2d948eaaef..b447d52dab 100644 --- a/src/northbridge/intel/sandybridge/northbridge.c +++ b/src/northbridge/intel/sandybridge/northbridge.c @@ -61,11 +61,6 @@ int bridge_silicon_revision(void) static const int legacy_hole_base_k = 0xa0000 / 1024; static const int legacy_hole_size_k = 384; -int add_northbridge_resources(struct lb_memory *mem) -{ - return 0; -} - void cbmem_post_handling(void) { update_mrc_cache(); -- cgit v1.2.3