From 5d1f9a009647c741e8587015b14f1e852e1c489e Mon Sep 17 00:00:00 2001 From: Julius Werner Date: Thu, 7 Mar 2019 17:07:26 -0800 Subject: Fix up remaining boolean uses of CONFIG_XXX to CONFIG(XXX) This patch cleans up remaining uses of raw boolean Kconfig values I could find by wrapping them with CONFIG(). The remaining naked config value warnings in the code should all be false positives now (although the process was semi-manual and involved some eyeballing so I may have missed a few). Change-Id: Ifa0573a535addc3354a74e944c0920befb0666be Signed-off-by: Julius Werner Reviewed-on: https://review.coreboot.org/c/coreboot/+/31813 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber --- src/northbridge/intel/i945/gma.c | 4 ++-- src/northbridge/intel/i945/raminit.c | 2 +- src/northbridge/intel/sandybridge/romstage.c | 2 +- 3 files changed, 4 insertions(+), 4 deletions(-) (limited to 'src/northbridge/intel') diff --git a/src/northbridge/intel/i945/gma.c b/src/northbridge/intel/i945/gma.c index ee656de66a..9c4f410d02 100644 --- a/src/northbridge/intel/i945/gma.c +++ b/src/northbridge/intel/i945/gma.c @@ -677,10 +677,10 @@ static void gma_ngi(struct device *const dev) if (err == 0) gfx_set_init_done(1); /* Linux relies on VBT for panel info. */ - if (CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GM) { + if (CONFIG(NORTHBRIDGE_INTEL_SUBTYPE_I945GM)) { generate_fake_intel_oprom(&conf->gfx, dev, "$VBT CALISTOGA"); } - if (CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GC) { + if (CONFIG(NORTHBRIDGE_INTEL_SUBTYPE_I945GC)) { generate_fake_intel_oprom(&conf->gfx, dev, "$VBT LAKEPORT-G"); } } diff --git a/src/northbridge/intel/i945/raminit.c b/src/northbridge/intel/i945/raminit.c index 05b577787d..be3d17a2fd 100644 --- a/src/northbridge/intel/i945/raminit.c +++ b/src/northbridge/intel/i945/raminit.c @@ -284,7 +284,7 @@ static void sdram_detect_errors(struct sys_info *sysinfo) pci_write_config8(PCI_DEV(0, 0x1f, 0), 0xa2, reg8); /* clear self refresh status if check is disabled or not a resume */ - if (!CONFIG_CHECK_SLFRCS_ON_RESUME + if (!CONFIG(CHECK_SLFRCS_ON_RESUME) || sysinfo->boot_path != BOOT_PATH_RESUME) { MCHBAR8(SLFRCS) |= 3; } else { diff --git a/src/northbridge/intel/sandybridge/romstage.c b/src/northbridge/intel/sandybridge/romstage.c index b49165cb3f..7465080bbf 100644 --- a/src/northbridge/intel/sandybridge/romstage.c +++ b/src/northbridge/intel/sandybridge/romstage.c @@ -67,7 +67,7 @@ void mainboard_romstage_entry(unsigned long bist) mainboard_config_superio(); /* USB is initialized in MRC if MRC is used. */ - if (CONFIG_USE_NATIVE_RAMINIT) { + if (CONFIG(USE_NATIVE_RAMINIT)) { early_usb_init(mainboard_usb_ports); } -- cgit v1.2.3