From 55823c3d36d783a856b60e7b216cae05b2f470c4 Mon Sep 17 00:00:00 2001 From: Felix Held Date: Sat, 28 Jul 2018 00:41:57 +0200 Subject: sandybridge/raminit: use MCHBAR32 macro everywhere Change-Id: I42d97d278c81ce2cfd0010830c2e0bacddd947d6 Signed-off-by: Felix Held Reviewed-on: https://review.coreboot.org/27675 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Rudolph Reviewed-by: Arthur Heymans Reviewed-by: Paul Menzel --- src/northbridge/intel/sandybridge/raminit.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'src/northbridge/intel') diff --git a/src/northbridge/intel/sandybridge/raminit.c b/src/northbridge/intel/sandybridge/raminit.c index 31c7d5bc5b..f646a7706e 100644 --- a/src/northbridge/intel/sandybridge/raminit.c +++ b/src/northbridge/intel/sandybridge/raminit.c @@ -335,10 +335,10 @@ static void init_dram_ddr3(int min_tck, int s3resume) wrmsr(0x000002e6, (msr_t) { .lo = 0, .hi = 0 }); - reg_5d10 = read32(DEFAULT_MCHBAR + 0x5d10); // !!! = 0x00000000 + reg_5d10 = MCHBAR32(0x5d10); // !!! = 0x00000000 if ((pci_read_config16(SOUTHBRIDGE, 0xa2) & 0xa0) == 0x20 /* 0x0004 */ && reg_5d10 && !s3resume) { - write32(DEFAULT_MCHBAR + 0x5d10, 0); + MCHBAR32(0x5d10) = 0; /* Need reset. */ outb(0x6, 0xcf9); @@ -438,7 +438,7 @@ static void init_dram_ddr3(int min_tck, int s3resume) die("raminit failed"); /* FIXME: should be hardware revision-dependent. */ - write32(DEFAULT_MCHBAR + 0x5024, 0x00a030ce); + MCHBAR32(0x5024) = 0x00a030ce; set_scrambling_seed(&ctrl); -- cgit v1.2.3