From 2a8ceefb277f3b395121bfdd9667cb1bf84bf222 Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Tue, 15 Sep 2020 12:23:45 +0200 Subject: nb/intel/x4x/iomap.h: Rename to memmap.h It primarily contains definitions for MMIO windows. Also, remove includes from files not directly using the definitions it contains. Tested with BUILD_TIMELESS=1, Asus P5QL PRO remains identical. Change-Id: Id28080d9b2924463dd3720492d5e717d65fa0071 Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/coreboot/+/45419 Reviewed-by: Patrick Rudolph Tested-by: build bot (Jenkins) --- src/northbridge/intel/x4x/acpi/x4x.asl | 2 +- src/northbridge/intel/x4x/bootblock.c | 1 - src/northbridge/intel/x4x/dq_dqs.c | 1 - src/northbridge/intel/x4x/early_init.c | 1 - src/northbridge/intel/x4x/iomap.h | 13 ------------- src/northbridge/intel/x4x/memmap.h | 13 +++++++++++++ src/northbridge/intel/x4x/northbridge.c | 2 +- src/northbridge/intel/x4x/raminit.c | 1 - src/northbridge/intel/x4x/raminit_ddr23.c | 1 - src/northbridge/intel/x4x/rcven.c | 1 - src/northbridge/intel/x4x/x4x.h | 2 +- 11 files changed, 16 insertions(+), 22 deletions(-) delete mode 100644 src/northbridge/intel/x4x/iomap.h create mode 100644 src/northbridge/intel/x4x/memmap.h (limited to 'src/northbridge/intel') diff --git a/src/northbridge/intel/x4x/acpi/x4x.asl b/src/northbridge/intel/x4x/acpi/x4x.asl index 51deea8f67..5a3c0b6132 100644 --- a/src/northbridge/intel/x4x/acpi/x4x.asl +++ b/src/northbridge/intel/x4x/acpi/x4x.asl @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include "hostbridge.asl" -#include "../iomap.h" +#include "../memmap.h" #include /* PCI Device Resource Consumption */ diff --git a/src/northbridge/intel/x4x/bootblock.c b/src/northbridge/intel/x4x/bootblock.c index baa4ae336c..1192fdb1cb 100644 --- a/src/northbridge/intel/x4x/bootblock.c +++ b/src/northbridge/intel/x4x/bootblock.c @@ -5,7 +5,6 @@ #include #include "x4x.h" -#include "iomap.h" void bootblock_early_northbridge_init(void) { diff --git a/src/northbridge/intel/x4x/dq_dqs.c b/src/northbridge/intel/x4x/dq_dqs.c index 7378391507..1535452c1f 100644 --- a/src/northbridge/intel/x4x/dq_dqs.c +++ b/src/northbridge/intel/x4x/dq_dqs.c @@ -6,7 +6,6 @@ #include #include #include "x4x.h" -#include "iomap.h" static void print_dll_setting(const struct dll_setting *dll_setting, u8 default_verbose) diff --git a/src/northbridge/intel/x4x/early_init.c b/src/northbridge/intel/x4x/early_init.c index d3c3308831..81752cdd9f 100644 --- a/src/northbridge/intel/x4x/early_init.c +++ b/src/northbridge/intel/x4x/early_init.c @@ -2,7 +2,6 @@ #include #include -#include "iomap.h" #if CONFIG(SOUTHBRIDGE_INTEL_I82801GX) #include /* DEFAULT_PMBASE */ #else diff --git a/src/northbridge/intel/x4x/iomap.h b/src/northbridge/intel/x4x/iomap.h deleted file mode 100644 index 22a675fc42..0000000000 --- a/src/northbridge/intel/x4x/iomap.h +++ /dev/null @@ -1,13 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ - -#ifndef X4X_IOMAP_H -#define X4X_IOMAP_H - -#define DEFAULT_MCHBAR 0xfed14000 /* 16 KB */ -#define DEFAULT_DMIBAR 0xfed18000 /* 4 KB */ -#define DEFAULT_EPBAR 0xfed19000 /* 4 KB */ -#define DEFAULT_HECIBAR 0xfed10000 - -#define TPM_BASE_ADDRESS 0xfed40000 - -#endif /* X4X_IOMAP_H */ diff --git a/src/northbridge/intel/x4x/memmap.h b/src/northbridge/intel/x4x/memmap.h new file mode 100644 index 0000000000..e4aafffbf6 --- /dev/null +++ b/src/northbridge/intel/x4x/memmap.h @@ -0,0 +1,13 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#ifndef X4X_MEMMAP_H +#define X4X_MEMMAP_H + +#define DEFAULT_MCHBAR 0xfed14000 /* 16 KB */ +#define DEFAULT_DMIBAR 0xfed18000 /* 4 KB */ +#define DEFAULT_EPBAR 0xfed19000 /* 4 KB */ +#define DEFAULT_HECIBAR 0xfed10000 + +#define TPM_BASE_ADDRESS 0xfed40000 + +#endif /* X4X_MEMMAP_H */ diff --git a/src/northbridge/intel/x4x/northbridge.c b/src/northbridge/intel/x4x/northbridge.c index 99b1f21843..5e46270dc1 100644 --- a/src/northbridge/intel/x4x/northbridge.c +++ b/src/northbridge/intel/x4x/northbridge.c @@ -8,7 +8,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/src/northbridge/intel/x4x/raminit.c b/src/northbridge/intel/x4x/raminit.c index c68c70bd31..a1be5aa449 100644 --- a/src/northbridge/intel/x4x/raminit.c +++ b/src/northbridge/intel/x4x/raminit.c @@ -14,7 +14,6 @@ #include #include -#include "iomap.h" #include "x4x.h" #define MRC_CACHE_VERSION 0 diff --git a/src/northbridge/intel/x4x/raminit_ddr23.c b/src/northbridge/intel/x4x/raminit_ddr23.c index 2c250683a1..617ce11581 100644 --- a/src/northbridge/intel/x4x/raminit_ddr23.c +++ b/src/northbridge/intel/x4x/raminit_ddr23.c @@ -13,7 +13,6 @@ #include #endif #include -#include "iomap.h" #include "x4x.h" #define ME_UMA_SIZEMB 0 diff --git a/src/northbridge/intel/x4x/rcven.c b/src/northbridge/intel/x4x/rcven.c index 506282bc38..82481abe30 100644 --- a/src/northbridge/intel/x4x/rcven.c +++ b/src/northbridge/intel/x4x/rcven.c @@ -3,7 +3,6 @@ #include #include #include -#include "iomap.h" #include "x4x.h" #define MAX_COARSE 15 diff --git a/src/northbridge/intel/x4x/x4x.h b/src/northbridge/intel/x4x/x4x.h index 45785a02a1..98b6038f5b 100644 --- a/src/northbridge/intel/x4x/x4x.h +++ b/src/northbridge/intel/x4x/x4x.h @@ -4,7 +4,7 @@ #define __NORTHBRIDGE_INTEL_X4X_H__ #include -#include "iomap.h" +#include "memmap.h" /* * D0:F0 -- cgit v1.2.3