From 0509009f7986152dc2407fe98dbdfe9aa6eb355a Mon Sep 17 00:00:00 2001 From: Elyes Haouas Date: Sun, 17 Sep 2023 09:49:43 +0200 Subject: nb/intel/gm45/raminit: Use read32p() Built roda/rk9 with BUILD_TIMELESS=1 and the resulting coreboot.rom remains identical. Change-Id: Ib1e7144eebf8148c4eb5cc0e7bc03ae3d7281092 Signed-off-by: Elyes Haouas Signed-off-by: Felix Singer Reviewed-on: https://review.coreboot.org/c/coreboot/+/77971 Reviewed-by: Felix Singer Reviewed-by: Felix Held Tested-by: build bot (Jenkins) --- src/northbridge/intel/gm45/raminit.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/northbridge/intel') diff --git a/src/northbridge/intel/gm45/raminit.c b/src/northbridge/intel/gm45/raminit.c index a998d771c8..b7e013959a 100644 --- a/src/northbridge/intel/gm45/raminit.c +++ b/src/northbridge/intel/gm45/raminit.c @@ -1965,7 +1965,7 @@ static void jedec_init_ddr2(const timings_t *const timings, jedec_command(rankaddr, DCC_CMD_ABP, 0); jedec_command(rankaddr, DCC_CMD_CBR, 0); udelay(1); - read32((void *)(rankaddr)); + read32p(rankaddr); jedec_command(rankaddr, DCC_SET_MREG, WR | CAS | BTinterleaved | BL8); jedec_command(rankaddr, DCC_SET_EREGx(1), OCDdefault | ODT_150OHMS); -- cgit v1.2.3