From baf27dbaeb1f6791ebfc416f2175507686bd88ac Mon Sep 17 00:00:00 2001 From: Julius Werner Date: Wed, 2 Oct 2019 17:28:56 -0700 Subject: cbfs: Enable CBFS mcache on most chipsets This patch flips the default of CONFIG_NO_CBFS_MCACHE so the feature is enabled by default. Some older chipsets with insufficient SRAM/CAR space still have it explicitly disabled. All others get the new section added to their memlayout... 8K seems like a sane default to start with. Change-Id: I0abd1c813aece6e78fb883f292ce6c9319545c44 Signed-off-by: Julius Werner Reviewed-on: https://review.coreboot.org/c/coreboot/+/38424 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh --- src/northbridge/intel/x4x/Kconfig | 1 + 1 file changed, 1 insertion(+) (limited to 'src/northbridge/intel/x4x') diff --git a/src/northbridge/intel/x4x/Kconfig b/src/northbridge/intel/x4x/Kconfig index 00e9a3ad21..8226fe90ee 100644 --- a/src/northbridge/intel/x4x/Kconfig +++ b/src/northbridge/intel/x4x/Kconfig @@ -13,6 +13,7 @@ config NORTHBRIDGE_SPECIFIC_OPTIONS # dummy select CACHE_MRC_SETTINGS select PARALLEL_MP select BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES + select NO_CBFS_MCACHE config CBFS_SIZE hex -- cgit v1.2.3