From 349e08535a7666cabe52ebc331e3bce5468b786b Mon Sep 17 00:00:00 2001
From: Arthur Heymans <arthur@aheymans.xyz>
Date: Sun, 9 Apr 2017 20:48:37 +0200
Subject: sb/intel/i82801jx: Add correct PCI ids and change names

Change-Id: Ic9226098dafa2465aa5fccc72c442de2b94e44c7
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/19249
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
---
 src/northbridge/intel/x4x/early_init.c   | 4 ++++
 src/northbridge/intel/x4x/raminit.c      | 4 ++++
 src/northbridge/intel/x4x/raminit_ddr2.c | 3 ++-
 3 files changed, 10 insertions(+), 1 deletion(-)

(limited to 'src/northbridge/intel/x4x')

diff --git a/src/northbridge/intel/x4x/early_init.c b/src/northbridge/intel/x4x/early_init.c
index c70e3862c1..27fe9162f0 100644
--- a/src/northbridge/intel/x4x/early_init.c
+++ b/src/northbridge/intel/x4x/early_init.c
@@ -17,7 +17,11 @@
 #include <stdint.h>
 #include <arch/io.h>
 #include "iomap.h"
+#if IS_ENABLED(CONFIG_SOUTHBRIDGE_INTEL_I82801GX)
 #include <southbridge/intel/i82801gx/i82801gx.h> /* DEFAULT_PMBASE */
+#else
+#include <southbridge/intel/i82801jx/i82801jx.h> /* DEFAULT_PMBASE */
+#endif
 #include <pc80/mc146818rtc.h>
 #include "x4x.h"
 #include <cbmem.h>
diff --git a/src/northbridge/intel/x4x/raminit.c b/src/northbridge/intel/x4x/raminit.c
index e842fb5163..dc64c51ffc 100644
--- a/src/northbridge/intel/x4x/raminit.c
+++ b/src/northbridge/intel/x4x/raminit.c
@@ -23,7 +23,11 @@
 #include <halt.h>
 #include <lib.h>
 #include "iomap.h"
+#if IS_ENABLED(CONFIG_SOUTHBRIDGE_INTEL_I82801GX)
 #include <southbridge/intel/i82801gx/i82801gx.h> /* smbus_read_byte */
+#else
+#include <southbridge/intel/i82801jx/i82801jx.h> /* smbus_read_byte */
+#endif
 #include "x4x.h"
 #include <pc80/mc146818rtc.h>
 #include <spd.h>
diff --git a/src/northbridge/intel/x4x/raminit_ddr2.c b/src/northbridge/intel/x4x/raminit_ddr2.c
index a4a830d75f..ff0d244eb5 100644
--- a/src/northbridge/intel/x4x/raminit_ddr2.c
+++ b/src/northbridge/intel/x4x/raminit_ddr2.c
@@ -21,9 +21,10 @@
 #include <commonlib/helpers.h>
 #include <delay.h>
 #include <pc80/mc146818rtc.h>
-/* This northbridge can also occur with ICH10 */
 #if IS_ENABLED(CONFIG_SOUTHBRIDGE_INTEL_I82801GX)
 #include <southbridge/intel/i82801gx/i82801gx.h>
+#else
+#include <southbridge/intel/i82801jx/i82801jx.h>
 #endif
 #include "iomap.h"
 #include "x4x.h"
-- 
cgit v1.2.3