From e729366d7a5246eeae6a9b0bb30271fc92ac5136 Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Mon, 1 May 2017 18:36:59 +0200 Subject: nb/intel/x4x/raminit: Remove very long delay MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit It is not really known why there is such a long delay, but it works fine without it. TESTED on ga-g41m-es2l. Change-Id: Idff5b978bbf161f8520d8000848e7b11c98c3945 Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/19514 Reviewed-by: Philippe Mathieu-Daudé Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth --- src/northbridge/intel/x4x/raminit_ddr2.c | 2 -- 1 file changed, 2 deletions(-) (limited to 'src/northbridge/intel/x4x/raminit_ddr2.c') diff --git a/src/northbridge/intel/x4x/raminit_ddr2.c b/src/northbridge/intel/x4x/raminit_ddr2.c index 35caaa6b73..2178e24505 100644 --- a/src/northbridge/intel/x4x/raminit_ddr2.c +++ b/src/northbridge/intel/x4x/raminit_ddr2.c @@ -1923,8 +1923,6 @@ void raminit_ddr2(struct sysinfo *s) die("Error: DDR is faster than FSB, halt\n"); } - mdelay(250); - // Program clock crossing clkcross_ddr2(s); printk(BIOS_DEBUG, "Done clk crossing\n"); -- cgit v1.2.3