From bf0970e762a6611cef06af761bc2dec068d439bb Mon Sep 17 00:00:00 2001
From: Elyes HAOUAS <ehaouas@noos.fr>
Date: Thu, 21 Mar 2019 11:10:03 +0100
Subject: src: Use include <delay.h> when appropriate

Change-Id: I23bc0191ca8fcd88364e5c08be7c90195019e399
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32012
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-by: David Guckian
---
 src/northbridge/intel/x4x/raminit.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

(limited to 'src/northbridge/intel/x4x/raminit.c')

diff --git a/src/northbridge/intel/x4x/raminit.c b/src/northbridge/intel/x4x/raminit.c
index 02a8b74f70..4943428d0e 100644
--- a/src/northbridge/intel/x4x/raminit.c
+++ b/src/northbridge/intel/x4x/raminit.c
@@ -21,15 +21,12 @@
 #include <cpu/x86/cache.h>
 #include <cpu/x86/mtrr.h>
 #include <arch/cpu.h>
-#include <delay.h>
 #include <halt.h>
-#include "iomap.h"
 #if CONFIG(SOUTHBRIDGE_INTEL_I82801GX)
 #include <southbridge/intel/i82801gx/i82801gx.h> /* smbus_read_byte */
 #else
 #include <southbridge/intel/i82801jx/i82801jx.h> /* smbus_read_byte */
 #endif
-#include "x4x.h"
 #include <spd.h>
 #include <string.h>
 #include <device/dram/ddr2.h>
@@ -37,6 +34,9 @@
 #include <mrc_cache.h>
 #include <timestamp.h>
 
+#include "iomap.h"
+#include "x4x.h"
+
 #define MRC_CACHE_VERSION 0
 
 static inline int spd_read_byte(unsigned int device, unsigned int address)
-- 
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