From a090ae04c285c4086973e826a36fe87dfeb74d9e Mon Sep 17 00:00:00 2001 From: Damien Zammit Date: Sat, 21 May 2016 01:56:01 +1000 Subject: nb/intel/x4x: Add DMI/EP init The values were obtained from vendor bios at runtime. I am not 100% sure of the sequence required to initiate them, but guessed from the gm45 code. There may be some status bytes needed to be polled during the sequence that is missing, but as I don't have bios writer's datasheet it's very hard for me to know. Change-Id: Idd205e0bab5f75e01c6e3a5dc320c08639f52db8 Signed-off-by: Damien Zammit Reviewed-on: https://review.coreboot.org/14925 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth --- src/northbridge/intel/x4x/Makefile.inc | 1 + 1 file changed, 1 insertion(+) (limited to 'src/northbridge/intel/x4x/Makefile.inc') diff --git a/src/northbridge/intel/x4x/Makefile.inc b/src/northbridge/intel/x4x/Makefile.inc index 34d9b0fdd7..3520944ea2 100644 --- a/src/northbridge/intel/x4x/Makefile.inc +++ b/src/northbridge/intel/x4x/Makefile.inc @@ -20,6 +20,7 @@ romstage-y += early_init.c romstage-y += raminit.c romstage-y += raminit_ddr2.c romstage-y += ram_calc.c +romstage-y += pcie.c ramstage-y += acpi.c ramstage-y += ram_calc.c -- cgit v1.2.3