From 43a1f780ff6809f758092136b0b38c6917c27340 Mon Sep 17 00:00:00 2001 From: Damien Zammit Date: Wed, 19 Aug 2015 15:16:59 +1000 Subject: northbridge/intel/x4x: Intel 4-series northbridge support Boots to console on Gigabyte GA-G41M-ES2L Ram initialization *not* included in this patch VGA native init works on analog connector Change-Id: I5262f73fd03d5e5c12e9f11d027bdfbbf0ddde82 Signed-off-by: Damien Zammit Reviewed-on: https://review.coreboot.org/11305 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc --- src/northbridge/intel/x4x/Makefile.inc | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) create mode 100644 src/northbridge/intel/x4x/Makefile.inc (limited to 'src/northbridge/intel/x4x/Makefile.inc') diff --git a/src/northbridge/intel/x4x/Makefile.inc b/src/northbridge/intel/x4x/Makefile.inc new file mode 100644 index 0000000000..8d1247e3a9 --- /dev/null +++ b/src/northbridge/intel/x4x/Makefile.inc @@ -0,0 +1,27 @@ +# +# This file is part of the coreboot project. +# +# Copyright (C) 2012 secunet Security Networks AG +# Copyright (C) 2015 Damien Zammit +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; version 2 of the License. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# + +ifeq ($(CONFIG_NORTHBRIDGE_INTEL_X4X),y) + +romstage-y += early_init.c +romstage-y += ram_calc.c + +ramstage-y += acpi.c +ramstage-y += ram_calc.c +ramstage-y += gma.c +ramstage-y += northbridge.c + +endif -- cgit v1.2.3