From b631d07494805d7e3c7729ebd12c25f2166ff550 Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Sat, 2 May 2020 20:00:32 +0200 Subject: nb/intel/sandybridge: Refactor IOSAV_SUBSEQUENCE again To replace the register writes with assignments to struct fields, we would need to have the values as parameters of a single macro. So, split the raw value of `IOSAV_n_SP_CMD_CTRL_ch` in two parts. Note that the single command that sets bit 17 is likely wrong, but it will be fixed after refactoring. For now, we'll treat it as part of `ranksel`. Move the parameters of `ADDR_UPDATE` into the top-level IOSAV macro. Hopefully, this will be enough to replace the underlying implementation. Line length limits are not for review. Breaking the lines unnecessarily complicates search and replace operations, and wil be taken care of in subsequent commits. Tested with BUILD_TIMELESS=1, ASUS P8Z77-V LX2 remains unchanged. Change-Id: I404edbd5d90ddc2a6993f39f552480d1ef24e153 Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/coreboot/+/40978 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Rudolph Reviewed-by: Arthur Heymans --- src/northbridge/intel/sandybridge/raminit_common.h | 2 -- 1 file changed, 2 deletions(-) (limited to 'src/northbridge/intel/sandybridge/raminit_common.h') diff --git a/src/northbridge/intel/sandybridge/raminit_common.h b/src/northbridge/intel/sandybridge/raminit_common.h index 55b3fc5d5b..c544cdebaf 100644 --- a/src/northbridge/intel/sandybridge/raminit_common.h +++ b/src/northbridge/intel/sandybridge/raminit_common.h @@ -25,8 +25,6 @@ #define NUM_SLOTS 2 #define NUM_LANES 9 -#define NO_RANKSEL (~0) -#define RANKSEL (1 << 16) #define IOSAV_MRS (0xf000) #define IOSAV_PRE (0xf002) #define IOSAV_ZQCS (0xf003) -- cgit v1.2.3