From 87ddea26cf1e8fce25e33c4f2db2533e0f612ac7 Mon Sep 17 00:00:00 2001 From: Felix Held Date: Sun, 26 Jan 2020 04:55:27 +0100 Subject: nb/intel/sandybridge: replace NORTHBRIDGE with HOST_BRIDGE define The two defines are identical, so deduplicate this. Timeless build for lenovo/x230 results in identical binary. Change-Id: I32e0eee88d72eb6f8dc71b0324d62f46079120a9 Signed-off-by: Felix Held Reviewed-on: https://review.coreboot.org/c/coreboot/+/38579 Tested-by: build bot (Jenkins) Reviewed-by: HAOUAS Elyes Reviewed-by: Angel Pons Reviewed-by: Patrick Rudolph --- src/northbridge/intel/sandybridge/raminit_common.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'src/northbridge/intel/sandybridge/raminit_common.c') diff --git a/src/northbridge/intel/sandybridge/raminit_common.c b/src/northbridge/intel/sandybridge/raminit_common.c index c69c827136..7136cd42d2 100644 --- a/src/northbridge/intel/sandybridge/raminit_common.c +++ b/src/northbridge/intel/sandybridge/raminit_common.c @@ -497,7 +497,6 @@ void dram_zones(ramctr_timing *ctrl, int training) } } -#define HOST_BRIDGE PCI_DEV(0, 0, 0) #define DEFAULT_TCK TCK_800MHZ unsigned int get_mem_min_tck(void) @@ -595,7 +594,7 @@ void dram_memorymap(ramctr_timing *ctrl, int me_uma_size) mmiosize = get_mmio_size(); - ggc = pci_read_config16(NORTHBRIDGE, GGC); + ggc = pci_read_config16(HOST_BRIDGE, GGC); if (!(ggc & 2)) { gfxstolen = ((ggc >> 3) & 0x1f) * 32; gttsize = ((ggc >> 8) & 0x3); -- cgit v1.2.3