From cb08e169cf959333206ef69d8aa82808ef797eb7 Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Tue, 15 Oct 2013 17:19:41 +0300 Subject: CBMEM intel: Define get_top_of_ram() once per chipset MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Only have one definition of get_top_of_ram() function and compile it using __SIMPLE_DEVICE__ for both romstage and ramstage. Implemented like this on intel/northbridge/gm45 already. This also adds get_top_of_ram() to i945 ramstage. Change-Id: Ia82cf6e47a4c929223ea3d8f233d606e6f5bf2f1 Signed-off-by: Kyösti Mälkki Reviewed-on: http://review.coreboot.org/3993 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/northbridge/intel/sandybridge/raminit.c | 7 ------- 1 file changed, 7 deletions(-) (limited to 'src/northbridge/intel/sandybridge/raminit.c') diff --git a/src/northbridge/intel/sandybridge/raminit.c b/src/northbridge/intel/sandybridge/raminit.c index 07172fc768..3b6557199f 100644 --- a/src/northbridge/intel/sandybridge/raminit.c +++ b/src/northbridge/intel/sandybridge/raminit.c @@ -302,10 +302,3 @@ void sdram_initialize(struct pei_data *pei_data) if (pei_data->boot_mode != 2) save_mrc_data(pei_data); } - -unsigned long get_top_of_ram(void) -{ - /* Base of TSEG is top of usable DRAM */ - u32 tom = pci_read_config32(PCI_DEV(0,0,0), TSEG); - return (unsigned long) tom; -} -- cgit v1.2.3