From 266a1f794dc28053e97794cbeb3f1a588137698b Mon Sep 17 00:00:00 2001 From: Patrick Rudolph Date: Thu, 9 Jun 2016 18:13:34 +0200 Subject: nb/intel/raminit (native): Read PCI mmio size from devicetree Instead of hardcoding the PCI mmio size read it from devicetree. Set a default value of 2048 MiB and 1024MiB for laptops without discrete graphics. Tested on Sandybridge Lenovo T520. Change-Id: I791ebd6897c5ba4e2e18bd307d320568b1378a13 Signed-off-by: Patrick Rudolph Reviewed-on: https://review.coreboot.org/15140 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/northbridge/intel/sandybridge/chip.h | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'src/northbridge/intel/sandybridge/chip.h') diff --git a/src/northbridge/intel/sandybridge/chip.h b/src/northbridge/intel/sandybridge/chip.h index 5effc0da95..d002824287 100644 --- a/src/northbridge/intel/sandybridge/chip.h +++ b/src/northbridge/intel/sandybridge/chip.h @@ -47,6 +47,11 @@ struct northbridge_intel_sandybridge_config { u16 max_mem_clock_mhz; struct i915_gpu_controller_info gfx; + + /* + * Maximum PCI mmio size in MiB. + */ + u16 pci_mmio_size; }; #endif /* NORTHBRIDGE_INTEL_SANDYBRIDGE_CHIP_H */ -- cgit v1.2.3