From 0b643d24994588480a3ca77ecacbb7ce66402195 Mon Sep 17 00:00:00 2001 From: Patrick Rudolph Date: Wed, 5 Jul 2017 20:07:06 +0200 Subject: nb/intel/sandybridge/peg: Add PEG driver stub Required for other ACPI generators, like the one used for _ROM. * Add ACPI code for PEG10/PEG11/PEG12/PEG60 and include it on all platforms. * Add PCIe driver for PEG. The driver returns ACPI names for ssdt generators. Needs test on real hardware. Change-Id: I96835c43522580c95fd4f250c56bf9438e993bc1 Signed-off-by: Patrick Rudolph Reviewed-on: https://review.coreboot.org/22337 Reviewed-by: Martin Roth Tested-by: build bot (Jenkins) --- .../intel/sandybridge/acpi/hostbridge.asl | 3 +- src/northbridge/intel/sandybridge/acpi/peg.asl | 79 ++++++++++++++++++++++ .../intel/sandybridge/acpi/sandybridge.asl | 2 + 3 files changed, 83 insertions(+), 1 deletion(-) create mode 100644 src/northbridge/intel/sandybridge/acpi/peg.asl (limited to 'src/northbridge/intel/sandybridge/acpi') diff --git a/src/northbridge/intel/sandybridge/acpi/hostbridge.asl b/src/northbridge/intel/sandybridge/acpi/hostbridge.asl index 5988489243..09b8892141 100644 --- a/src/northbridge/intel/sandybridge/acpi/hostbridge.asl +++ b/src/northbridge/intel/sandybridge/acpi/hostbridge.asl @@ -37,7 +37,8 @@ Device (MCHC) MHEN, 1, // Enable , 13, // MHBR, 22, // MCHBAR - + Offset (0x54), + DVEN, 32, Offset (0x60), // PCIe BAR PXEN, 1, // Enable PXSZ, 2, // BAR size diff --git a/src/northbridge/intel/sandybridge/acpi/peg.asl b/src/northbridge/intel/sandybridge/acpi/peg.asl new file mode 100644 index 0000000000..f98a4ce083 --- /dev/null +++ b/src/northbridge/intel/sandybridge/acpi/peg.asl @@ -0,0 +1,79 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2017-2018 Patrick Rudolph + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2 of + * the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +Device (PEGP) +{ + Name (_ADR, 0x00010000) + + Method (_STA) + { + ShiftRight (\_SB.PCI0.MCHC.DVEN, 3, Local0) + Return (And (Local0, 1)) + } + + Device (DEV0) + { + Name(_ADR, 0x00000000) + } +} + +Device (PEG1) +{ + Name (_ADR, 0x00010001) + + Method (_STA) + { + ShiftRight (\_SB.PCI0.MCHC.DVEN, 2, Local0) + Return (And (Local0, 1)) + } + + Device (DEV0) + { + Name(_ADR, 0x00000000) + } +} + +Device (PEG2) +{ + Name (_ADR, 0x00010002) + + Method (_STA) + { + ShiftRight (\_SB.PCI0.MCHC.DVEN, 1, Local0) + Return (And (Local0, 1)) + } + + Device (DEV0) + { + Name(_ADR, 0x00000000) + } +} + +Device (PEG6) +{ + Name (_ADR, 0x00060000) + + Method (_STA) + { + ShiftRight (\_SB.PCI0.MCHC.DVEN, 13, Local0) + Return (And (Local0, 1)) + } + + Device (DEV0) + { + Name(_ADR, 0x00000000) + } +} diff --git a/src/northbridge/intel/sandybridge/acpi/sandybridge.asl b/src/northbridge/intel/sandybridge/acpi/sandybridge.asl index 609106f082..3076a68a9a 100644 --- a/src/northbridge/intel/sandybridge/acpi/sandybridge.asl +++ b/src/northbridge/intel/sandybridge/acpi/sandybridge.asl @@ -2,6 +2,7 @@ * This file is part of the coreboot project. * * Copyright (C) 2007-2009 coresystems GmbH + * Copyright (C) 2017-2018 Patrick Rudolph * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as @@ -16,6 +17,7 @@ #include "../sandybridge.h" #include "hostbridge.asl" +#include "peg.asl" /* PCI Device Resource Consumption */ Device (PDRC) -- cgit v1.2.3