From 7539b8c3914ca949b2cb1172f3c9c539cee48d4b Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Sun, 24 Dec 2017 10:42:57 +0100 Subject: nb/intel/sandybridge: Use common mrc cache functions This uses the functions in include/mrc_cache.h instead of northbidge/intel/common/mrc_cache.h Tested working on Lenovo Thinkpad x220, mrc_cache region gets written and S3 resume still works fine. Change-Id: I46002c0b19a55d855286eb8b0ca934ef7ca7fe09 Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/22982 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/northbridge/intel/sandybridge/Makefile.inc | 12 ------------ 1 file changed, 12 deletions(-) (limited to 'src/northbridge/intel/sandybridge/Makefile.inc') diff --git a/src/northbridge/intel/sandybridge/Makefile.inc b/src/northbridge/intel/sandybridge/Makefile.inc index 846d31bd78..1470353edf 100644 --- a/src/northbridge/intel/sandybridge/Makefile.inc +++ b/src/northbridge/intel/sandybridge/Makefile.inc @@ -45,16 +45,4 @@ romstage-y += ../../../arch/x86/walkcbfs.S smm-$(CONFIG_HAVE_SMI_HANDLER) += finalize.c -ifneq ($(CONFIG_CHROMEOS),y) -$(obj)/mrc.cache: $(obj)/config.h - dd if=/dev/zero count=1 \ - bs=$(shell printf "%d" $(CONFIG_MRC_CACHE_SIZE) ) | \ - tr '\000' '\377' > $@ - -cbfs-files-y += mrc.cache -mrc.cache-file := $(obj)/mrc.cache -mrc.cache-align := 0x10000 -mrc.cache-type := mrc_cache -endif - endif -- cgit v1.2.3