From f5cf60f25b8c77e0c90094e3326c5bc0e37cb383 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= <kyosti.malkki@gmail.com>
Date: Mon, 18 Mar 2019 15:26:48 +0200
Subject: Move calls to quick_ram_check() before CBMEM init
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After raminit completes, do a read-modify-write test
just below CBMEM top address. If test fails, die().

Change-Id: I33d4153a5ce0908b8889517394afb46f1ca28f92
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31978
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
---
 src/northbridge/intel/pineview/romstage.c | 3 ---
 1 file changed, 3 deletions(-)

(limited to 'src/northbridge/intel/pineview')

diff --git a/src/northbridge/intel/pineview/romstage.c b/src/northbridge/intel/pineview/romstage.c
index cf1da63f85..e6a344e738 100644
--- a/src/northbridge/intel/pineview/romstage.c
+++ b/src/northbridge/intel/pineview/romstage.c
@@ -18,7 +18,6 @@
  */
 
 #include <arch/io.h>
-#include <lib.h>
 #include <timestamp.h>
 #include <console/console.h>
 #include <device/pci_ops.h>
@@ -105,8 +104,6 @@ void mainboard_romstage_entry(unsigned long bist)
 
 	post_code(0x31);
 
-	quick_ram_check();
-
 	mb_pirq_setup();
 
 	rcba_config();
-- 
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