From df128a55b183d3d7a6d7ae986f33abffac50f371 Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Sat, 21 Sep 2019 18:35:37 +0300 Subject: intel/pci: Utilise pci_def.h for PCI_BRIDGE_CONTROL MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This is a PCI standard register, no need to alias its definitions under different names. Change-Id: Iea6b198dd70fe1e49b5dc0824dba62628dedc69a Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/35521 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/northbridge/intel/pineview/pineview.h | 1 - 1 file changed, 1 deletion(-) (limited to 'src/northbridge/intel/pineview/pineview.h') diff --git a/src/northbridge/intel/pineview/pineview.h b/src/northbridge/intel/pineview/pineview.h index f53ff17aa3..882f886b21 100644 --- a/src/northbridge/intel/pineview/pineview.h +++ b/src/northbridge/intel/pineview/pineview.h @@ -84,7 +84,6 @@ /* Device 0:1.0 PCI configuration space (PCI Express) */ -#define BCTRL1 0x3e /* 16bit */ #define PEGSTS 0x214 /* 32bit */ /* Device 0:2.0 PCI configuration space (Graphics Device) */ -- cgit v1.2.3