From 3b633bbf1dfcd9107b8a1cc86ce8c34f6fc06fdb Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Fri, 28 Apr 2017 22:36:17 +0200 Subject: cpu/intel/pineview: Include speedstep Needed to generate cpu entries. Change-Id: Ia3f5137c7642bb9f79562cc9d6e6881aca749179 Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/19496 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer --- src/northbridge/intel/pineview/northbridge.c | 1 + 1 file changed, 1 insertion(+) (limited to 'src/northbridge/intel/pineview/northbridge.c') diff --git a/src/northbridge/intel/pineview/northbridge.c b/src/northbridge/intel/pineview/northbridge.c index b7fd8a1085..ea55974ea0 100644 --- a/src/northbridge/intel/pineview/northbridge.c +++ b/src/northbridge/intel/pineview/northbridge.c @@ -153,6 +153,7 @@ static struct device_operations pci_domain_ops = { .init = mch_domain_init, .scan_bus = pci_domain_scan_bus, .ops_pci_bus = pci_bus_default_ops, + .acpi_fill_ssdt_generator = generate_cpu_entries, }; static void cpu_bus_init(device_t dev) -- cgit v1.2.3