From aba8fb115802df289007ae9df3269d65cfd008c5 Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Fri, 2 Aug 2019 06:11:28 +0300 Subject: intel/i945,gm45,pineview,x4x: Move stage cache support function MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Let garbage-collection take care of stage_cache_external_region() when it is not needed and move implementation to a suitable file already building for needed stages. Change-Id: Ic32adcc62c7ee21bf38e2e4e5ece00524871b091 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/34670 Tested-by: build bot (Jenkins) Reviewed-by: Arthur Heymans --- src/northbridge/intel/pineview/Makefile.inc | 3 --- 1 file changed, 3 deletions(-) (limited to 'src/northbridge/intel/pineview/Makefile.inc') diff --git a/src/northbridge/intel/pineview/Makefile.inc b/src/northbridge/intel/pineview/Makefile.inc index 2d166138b6..83487717df 100644 --- a/src/northbridge/intel/pineview/Makefile.inc +++ b/src/northbridge/intel/pineview/Makefile.inc @@ -30,8 +30,5 @@ romstage-y += raminit.c romstage-y += early_init.c postcar-y += ram_calc.c -romstage-$(CONFIG_CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM) += stage_cache.c -ramstage-$(CONFIG_CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM) += stage_cache.c -postcar-$(CONFIG_CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM) += stage_cache.c endif -- cgit v1.2.3