From e25b5ef39fd10e48e87e0c4770a721a786e36a36 Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Fri, 2 Dec 2016 08:56:05 +0200 Subject: MMCONF_SUPPORT: Consolidate resource registration MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: Id727270bff9e0288747d178c00f3d747fe223b0f Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/17695 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/northbridge/intel/nehalem/Kconfig | 4 ++++ src/northbridge/intel/nehalem/northbridge.c | 11 ++--------- 2 files changed, 6 insertions(+), 9 deletions(-) (limited to 'src/northbridge/intel/nehalem') diff --git a/src/northbridge/intel/nehalem/Kconfig b/src/northbridge/intel/nehalem/Kconfig index 4dada50aaf..884660ad88 100644 --- a/src/northbridge/intel/nehalem/Kconfig +++ b/src/northbridge/intel/nehalem/Kconfig @@ -24,6 +24,10 @@ config NORTHBRIDGE_INTEL_NEHALEM if NORTHBRIDGE_INTEL_NEHALEM +config MMCONF_BUS_NUMBER + int + default 256 + config CBFS_SIZE hex default 0x100000 diff --git a/src/northbridge/intel/nehalem/northbridge.c b/src/northbridge/intel/nehalem/northbridge.c index 06c0a9655b..779e49cd54 100644 --- a/src/northbridge/intel/nehalem/northbridge.c +++ b/src/northbridge/intel/nehalem/northbridge.c @@ -69,11 +69,6 @@ static void add_fixed_resources(struct device *dev, int index) 0xfed1c000-0xfed20000 RCBA 0xfed90000-0xfed94000 IOMMU 0xff800000-0xffffffff ROM. */ - resource = new_resource(dev, index++); - resource->base = (resource_t) 0xe0000000; - resource->size = (resource_t) 0x10000000; - resource->flags = IORESOURCE_MEM | IORESOURCE_RESERVE | - IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED; resource = new_resource(dev, index++); resource->base = (resource_t) 0xfed00000; @@ -98,10 +93,6 @@ static void pci_domain_set_resources(device_t dev) assign_resources(dev->link_list); } - /* TODO We could determine how many PCIe busses we need in - * the bar. For now that number is hardcoded to a max of 64. - * See e7525/northbridge.c for an example. - */ static struct device_operations pci_domain_ops = { .read_resources = pci_domain_read_resources, .set_resources = pci_domain_set_resources, @@ -119,6 +110,8 @@ static void mc_read_resources(device_t dev) pci_dev_read_resources(dev); + mmconf_resource(dev, 0x50); + tseg_base = pci_read_config32(dev_find_slot(0, PCI_DEVFN(0, 0)), TSEG); TOUUD = pci_read_config16(dev_find_slot(0, PCI_DEVFN(0, 0)), D0F0_TOUUD); -- cgit v1.2.3