From 4568f19d1fb0d118e5fcebbe82b7878951c4bfff Mon Sep 17 00:00:00 2001 From: Edward O'Callaghan Date: Sat, 6 Dec 2014 14:32:23 +1100 Subject: northbridge/intel/*/acpi/igd.asl: Trivial indent style fix Change-Id: I26e92645264c69bbc032b0e7e44d7d31de2dfa4d Signed-off-by: Edward O'Callaghan Reviewed-on: http://review.coreboot.org/7665 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc --- src/northbridge/intel/nehalem/acpi/igd.asl | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) (limited to 'src/northbridge/intel/nehalem') diff --git a/src/northbridge/intel/nehalem/acpi/igd.asl b/src/northbridge/intel/nehalem/acpi/igd.asl index a892ce24bb..8c6c174f34 100644 --- a/src/northbridge/intel/nehalem/acpi/igd.asl +++ b/src/northbridge/intel/nehalem/acpi/igd.asl @@ -24,21 +24,21 @@ Device (GFX0) Name (_ADR, 0x00020000) OperationRegion (GFXC, PCI_Config, 0x00, 0x0100) - Field (GFXC, DWordAcc, NoLock, Preserve) - { - Offset (0x10), - BAR0, 64 - } + Field (GFXC, DWordAcc, NoLock, Preserve) + { + Offset (0x10), + BAR0, 64 + } - OperationRegion (GFRG, SystemMemory, And (BAR0, 0xfffffffffffffff0), 0x400000) + OperationRegion (GFRG, SystemMemory, And (BAR0, 0xfffffffffffffff0), 0x400000) Field (GFRG, DWordAcc, NoLock, Preserve) - { - Offset (0x48254), + { + Offset (0x48254), BCLV, 16, - Offset (0xc8250), - CR1, 32, + Offset (0xc8250), + CR1, 32, CR2, 32 - } + } /* Display Output Switching */ Method (_DOS, 1) -- cgit v1.2.3