From 95de2317c6c6379e43d3b3c27d34eb66198dbe0a Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Mon, 17 Feb 2020 13:08:53 +0100 Subject: nb/intel/nehalem: Rename to ironlake The code is for Arrandale CPUs, whose System Agent is Ironlake. This change simply replaces `nehalem` with `ironlake` and `NEHALEM` with `IRONLAKE`. The remaining `Nehalem` cases are handled later, as changing some of them would impact the resulting binary. Tested with BUILD_TIMELESS=1 without adding the configuration options into the binary, and packardbell/ms2290 does not change. Change-Id: I8eb96eeb5e69f49150d47793b33e87b650c64acc Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/coreboot/+/38941 Reviewed-by: Felix Held Reviewed-by: Martin Roth Tested-by: build bot (Jenkins) --- src/northbridge/intel/ironlake/raminit_tables.h | 66 +++++++++++++++++++++++++ 1 file changed, 66 insertions(+) create mode 100644 src/northbridge/intel/ironlake/raminit_tables.h (limited to 'src/northbridge/intel/ironlake/raminit_tables.h') diff --git a/src/northbridge/intel/ironlake/raminit_tables.h b/src/northbridge/intel/ironlake/raminit_tables.h new file mode 100644 index 0000000000..d912d6b18a --- /dev/null +++ b/src/northbridge/intel/ironlake/raminit_tables.h @@ -0,0 +1,66 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2013 Vladimir Serbinenko. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef RAMINIT_TABLES_H +#define RAMINIT_TABLES_H + +#include + +/* [CHANNEL][EXT_REVISON][LANE][2*SLOT+RANK][CLOCK_SPEED] */ +extern const u8 u8_FFFD1240[2][5][9][4][4]; + +extern const u16 u16_FFFE0EB8[2][4]; + +/* [CARD][LANE][CLOCK_SPEED] */ +extern const u16 u16_ffd1188[2][9][4]; + +/* [REVISION][CHANNEL][CLOCK_INDEX][?] */ +extern const u8 u8_FFFD1891[2][2][4][12]; + +extern const u8 u8_FFFD17E0[2][5][4][4]; + +extern const u8 u8_FFFD0C78[2][5][4][2][2][4]; + +extern const u16 u16_fffd0c68[3]; + +extern const u16 u16_fffd0c70[2][2]; + +extern const u16 u16_fffd0c50[3][2][2]; + +/* [CLOCK_INDEX] */ +extern const u16 min_cycletime[4]; + +/* [CLOCK_INDEX] */ +extern const u16 min_cas_latency_time[4]; + +/* [CHANNEL][EXT_SILICON_REVISION][?][CLOCK_INDEX] */ +/* On other mobos may also depend on slot and rank. */ +extern const u8 u8_FFFD0EF8[2][5][4][4]; + +/* [CLOCK_SPEED] */ +extern const u8 u8_FFFD1218[4]; + +extern const u8 reg178_min[]; +extern const u8 reg178_max[]; +extern const u8 reg178_step[]; + +extern const u16 u16_ffd1178[2][4]; + +extern const u16 u16_fe0eb8[2][4]; + +extern const u8 lut16[4]; + +#endif // RAMINIT_TABLES_H -- cgit v1.2.3