From 3b264d00745cfb1deca560ea6c491632dd79835f Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Tue, 15 Sep 2020 00:25:49 +0200 Subject: nb/intel/ironlake: Clean up DMIBAR/EPBAR registers Several registers have been copy-pasted from i945 and do not exist on Ironlake. Moreover, other register definitions were missing. Use the newly-added definitions in existing code, in place of numerical offsets. Tested with BUILD_TIMELESS=1, Packard Bell MS2290 remains identical. Change-Id: I8ac99166a8029dcdbb59028b4a7ee297249de5db Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/coreboot/+/45380 Tested-by: build bot (Jenkins) Reviewed-by: Arthur Heymans --- src/northbridge/intel/ironlake/ironlake.h | 23 +++++++++++++++-------- 1 file changed, 15 insertions(+), 8 deletions(-) (limited to 'src/northbridge/intel/ironlake/ironlake.h') diff --git a/src/northbridge/intel/ironlake/ironlake.h b/src/northbridge/intel/ironlake/ironlake.h index 7ed6afde3e..73f430ff48 100644 --- a/src/northbridge/intel/ironlake/ironlake.h +++ b/src/northbridge/intel/ironlake/ironlake.h @@ -131,9 +131,6 @@ #define EPVC1RCTL 0x020 /* 32bit */ #define EPVC1RSTS 0x026 /* 16bit */ -#define EPVC1MTS 0x028 /* 32bit */ -#define EPVC1IST 0x038 /* 64bit */ - #define EPESD 0x044 /* 32bit */ #define EPLE1D 0x050 /* 32bit */ @@ -141,8 +138,6 @@ #define EPLE2D 0x060 /* 32bit */ #define EPLE2A 0x068 /* 64bit */ -#define PORTARB 0x100 /* 256bit */ - /* * DMIBAR */ @@ -160,10 +155,22 @@ #define DMIVC0RCAP 0x010 /* 32bit */ #define DMIVC0RCTL 0x014 /* 32bit */ #define DMIVC0RSTS 0x01a /* 16bit */ +#define VC0NP (1 << 1) #define DMIVC1RCAP 0x01c /* 32bit */ #define DMIVC1RCTL 0x020 /* 32bit */ #define DMIVC1RSTS 0x026 /* 16bit */ +#define VC1NP (1 << 1) + +#define DMIVCPRCAP 0x028 /* 32bit */ +#define DMIVCPRCTL 0x02c /* 32bit */ +#define DMIVCPRSTS 0x032 /* 16bit */ +#define VCPNP (1 << 1) + +#define DMIVCMRCAP 0x034 /* 32bit */ +#define DMIVCMRCTL 0x038 /* 32bit */ +#define DMIVCMRSTS 0x03e /* 16bit */ +#define VCMNP (1 << 1) #define DMILE1D 0x050 /* 32bit */ #define DMILE1A 0x058 /* 64bit */ @@ -174,12 +181,12 @@ #define DMILCTL 0x088 /* 16bit */ #define DMILSTS 0x08a /* 16bit */ -#define DMICTL1 0x0f0 /* 32bit */ -#define DMICTL2 0x0fc /* 32bit */ +#define DMIUESTS 0x1c4 /* 32bit */ +#define DMICESTS 0x1d0 /* 32bit */ #define DMICC 0x208 /* 32bit */ -#define DMIDRCCFG 0xeb4 /* 32bit */ +#define DMILLTC 0x238 /* 32bit */ #ifndef __ASSEMBLER__ -- cgit v1.2.3