From 503d3247e48d803ce36e98d2064cf22220bb0dfd Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Tue, 5 Mar 2019 07:54:28 +0200 Subject: Remove DEFAULT_PCIEXBAR alias MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The other DEFAULT_ entries are just immediate constants. Change-Id: Iebf4266810b8210cebabc814bba2776638d9b74d Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/31758 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin Reviewed-by: Patrick Rudolph Reviewed-by: Nico Huber --- src/northbridge/intel/i945/acpi/i945.asl | 2 +- src/northbridge/intel/i945/i945.h | 1 - 2 files changed, 1 insertion(+), 2 deletions(-) (limited to 'src/northbridge/intel/i945') diff --git a/src/northbridge/intel/i945/acpi/i945.asl b/src/northbridge/intel/i945/acpi/i945.asl index 79fb371250..7a9715c967 100644 --- a/src/northbridge/intel/i945/acpi/i945.asl +++ b/src/northbridge/intel/i945/acpi/i945.asl @@ -55,7 +55,7 @@ Device (PDRC) Memory32Fixed(ReadWrite, DEFAULT_MCHBAR, 0x00004000) Memory32Fixed(ReadWrite, DEFAULT_DMIBAR, 0x00001000) Memory32Fixed(ReadWrite, DEFAULT_EPBAR, 0x00001000) - Memory32Fixed(ReadWrite, DEFAULT_PCIEXBAR, 0x04000000) + Memory32Fixed(ReadWrite, CONFIG_MMCONF_BASE_ADDRESS, 0x04000000) Memory32Fixed(ReadWrite, 0xfed20000, 0x00020000) // Misc ICH Memory32Fixed(ReadWrite, 0xfed40000, 0x00005000) // Misc ICH Memory32Fixed(ReadWrite, 0xfed45000, 0x0004b000) // Misc ICH diff --git a/src/northbridge/intel/i945/i945.h b/src/northbridge/intel/i945/i945.h index 0db07e1caf..8c082416bc 100644 --- a/src/northbridge/intel/i945/i945.h +++ b/src/northbridge/intel/i945/i945.h @@ -17,7 +17,6 @@ #define NORTHBRIDGE_INTEL_I945_H /* Northbridge BARs */ -#define DEFAULT_PCIEXBAR CONFIG_MMCONF_BASE_ADDRESS /* 4 KB per PCIe device */ #define DEFAULT_X60BAR 0xfed13000 #ifndef __ACPI__ #define DEFAULT_MCHBAR ((u8 *)0xfed14000) /* 16 KB */ -- cgit v1.2.3