From f6d14773b24ef918bdafb1108ccbd87aa742fada Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Fri, 26 Jan 2018 11:50:04 +0100 Subject: nb/intel/i945: Add a common function to compute TSEG size This adds a common function to decode the TSEG size from the ESMRAM register. This will come in handy when SMM in TSEG is implemented. This function is used both in romstage and in ramstage. Change-Id: I4e163598752fb6cd036aec229fce439ebad74def Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/23448 Reviewed-by: Patrick Georgi Tested-by: build bot (Jenkins) --- src/northbridge/intel/i945/ram_calc.c | 38 ++++++++++++++++++----------------- 1 file changed, 20 insertions(+), 18 deletions(-) (limited to 'src/northbridge/intel/i945/ram_calc.c') diff --git a/src/northbridge/intel/i945/ram_calc.c b/src/northbridge/intel/i945/ram_calc.c index a106d117f2..15ba7f4527 100644 --- a/src/northbridge/intel/i945/ram_calc.c +++ b/src/northbridge/intel/i945/ram_calc.c @@ -25,6 +25,24 @@ #include #include +/* Decodes TSEG region size to bytes. */ +u32 decode_tseg_size(const u8 esmramc) +{ + if (!(esmramc & 1)) + return 0; + switch ((esmramc >> 1) & 3) { + case 0: + return 1 << 20; + case 1: + return 2 << 20; + case 2: + return 8 << 20; + case 3: + default: + die("Bad TSEG setting.\n"); + } +} + static uintptr_t smm_region_start(void) { uintptr_t tom; @@ -35,24 +53,8 @@ static uintptr_t smm_region_start(void) else tom = (pci_read_config8(PCI_DEV(0, 0, 0), TOLUD) & 0xf7) << 24; - /* if TSEG enabled subtract size */ - switch (pci_read_config8(PCI_DEV(0, 0, 0), ESMRAMC) & 0x07) { - case 0x01: - /* 1MB TSEG */ - tom -= 0x100000; - break; - case 0x03: - /* 2MB TSEG */ - tom -= 0x200000; - break; - case 0x05: - /* 8MB TSEG */ - tom -= 0x800000; - break; - default: - /* TSEG either disabled or invalid */ - break; - } + /* subsctract TSEG size */ + tom -= decode_tseg_size(pci_read_config8(PCI_DEV(0, 0, 0), ESMRAMC)); return tom; } -- cgit v1.2.3